Reflex Service
Manual Theory of Operation
On
the
falling
edge
of WC/,
SAMP
goes
low in
order
to
hold an
input sample
for
A/D conversion.
The internal SAR
then
applies
a
DAC
output t
DABO-1 5.
This
data
is
latched into the conversion
latches
on the positive
edge
of
the
CCLK1
signal. The
DATA
signal from
comparator
is then compared
by
the
Lexichip
to
determine the next
SAR
value.
Sixteen SAR
output
samples are
required
to
perform an analog
conversion. Since
the
later
samples
produce
smaller voltage changes on the
DAC
output,
less time is required for
the
DAC
to
settle.
The time duration between CCLK1
pulses toward the end of the
N
D
conversion is, therefore, reduced.
The
17th CCLK1 pulse after WC/ latches left
channel
data
out to
the DAC.
After sufficient
DAC settling
time, the left channel
deglitch switch is disabled
by
the
high
state
of DEGO, applying
a
DAC
sample
to
the left
channel output
circuitry.
The
last CCLK1 pulse
in
the WC/ cycle
latches right channel data to
the
DAC. DEG1 goes
high
which applies
the
DAC
sample
to
right channel
output
circuitry.
The Reflex
power
supply provides three
regulated
DC output
voltages:
+5VDC
for
digital circuits,
+5VDC for
analog
circuits,
and
-5VDC
for analog
circuits.
AC power
is
provided
by
an
external
transformer
rated
at
9VAC
@1
.OA.
The
transformer
output
is terminated
with
a 5
mm/2.5 mm
barrel
type
connector
(J5),
with
its
mating input
jack
located on the Reflex
rear panel.
A
.01
pF
capacitor (C32)
is connected across the AC
input
to
help
prevent noise spikes
from
entering
the unit.
In
addition,
C32
and
C33
stop
circuit generated
RFI
from
radiating through the power line.
The single
1
0
Q
series resistor (R33)
that is shared
by
the
inputs to the analog
voltage regulators
(U25
and
U26)
prevents
one rail from rising
much faster
than
the other.
This
quiets
down
the
output op-amp’s transients and makes
for
better audio
muting.
All
three regulated supplies
(+/-
5
VDC
analog
and
+5
VDC
digital) consist
of
a single
diode
(D4, D5, and D3)
used as a
half-wave rectifier
to produce the
unregulated 5
volt supply (approximately
1
0
VDC)
across each supply’s
filter
capacitor
(C34,
C35, and C26).The
analog supplies
use
1
000
pF
electrolytics
and the digital
supply
uses a
3300
)a.F electrolytic
capacitor
due to
the
added
load of
more circuitry
and front panel
display.
Each
supply
is post-regulator
filtered with
a
22
pF
capacitor
(C39, C40,
and
C23). The +5VUNREG supply
is
monitored
by
the reset circuit
for
power
up
and power
fail
conditions.
Voltage
regulation is handled
by
three
TO220
packaged
ICs:
-I-5VDC
digital
circuits
-
U17
(7805)
+5VDC
analog circuits
-
U25
(7805)
-5VDC
analog circuits
-
U26
(7905)
Current
limiting
and
short circuit protection are incorporated into the
internal
circuitry
of
these
ICs.
Power
Supply
4-n
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