Renesas RA4 Series User Manual

Renesas RA Microcontrollers EK-RA4M1 v1 – User's Manual
R20UT4579EU0100 Rev.1.00 Page 16 of 32
Oct.02.19
Table 4. J-Link Interface Conflicts
Programming Interface
Conflicting Interface
Port
Use
Interface
Use
P108
SWDIO/JTAG TMS
SPI
SSLB0 fixed function, J1-13
P109
SWO/JTAG TDO
SPI
MOSIB fixed function, J1-7
P300
SWCLK/JTAG TCK
GPT
GTIOC0A fixed function, J1-31
5.4.3 JTAG/SWD
A 10-pin Cortex
®
Debug Connector is provided at J10.
Table 5. JTAG/SWD Connector (J10)
JTAG Connector
EK-RA4M1
Pin
JTAG pin name
SWD pin name
Signal/Bus
1
VTref
VTref
+3V3
2
TMS
SWDIO
U1 P108/SWDIO (U1-51)
3
GND
GND
GND
4
TCK
SWCLK
U1 P300/SWCLK (U1-50)
5
GND
GND
GND
6
TDO
SWO
U1 P109 (U1-52)
7
Key
Key
N.C.
8
TDI
NC/EXTb
U1 P110 (U1-53)
9
GNDDetect
GNDDetect
N.C. (short E31 to connect to GND)
10
nSRST
nSRST
U1 RESET# (U1-38)
The Cortex
®
Debug Connector is fully described in the Arm
®
CoreSight
™
Architecture Specification.
The J-Link MCU Power copper jumper and J-Link Disconnects copper jumpers may be
open for proper operation of the JTAG interface to prevent interactions with the J-Link
MCU. See section 5.4.2, Debug USB for details.
If a JTAG adapter is in use that properly interprets the Arm
®
Cortex
®
10-pin Debug
Connector assignment of pin 9 to GND, the JTAG GNDDetect copper jumper E31
should be closed. If the JTAG adapter used is one of several that may be confused or
damaged by the presence of GND at pin 9, E31 should be open (as shipped).
The J-Link
®
OB interface is multiplexed with the JTAG interface, and can collectively be referred to as the
Programming Interface. While the J-Link
®
OB interface and the JTAG interface do not conflict, the J-Link
®
OB signals may be isolated from the programming interface by changing the copper jumpers as described in
section 5.4.2, Debug USB.
Four of the JTAG ports (P108, P109, P110, and P300) are multiplexed with the SPI Fixed Pin function on pin
header of J1. To use these signals for the SPI function, the J-Link debug function must be disabled. Details
of the multiplexed signals are shown in the following table.
Table 6. JTAG Interface Conflicts
Programming Interface
Conflicting Interface
Port
Use
Interface
Use
P108
TMS/J-Link SWDIO
SPI
SSLB0_B fixed function, J1-13
P109
TDO/J-Link SWO
SPI
MOSIB_B fixed function, J1-7
P110
TDI
SPI
MISOB_B fixed function, J1-9
P300
SWCLK
GPT
GTIOC0A_A fixed function, J1-31

Renesas RA4 Series Specifications

General

Brand	Renesas
Model	RA4 Series
Category	Motherboard
Language	English