Samsung MAX-485 - Page 25

Pin no. Symbol yo Description
51 C2FL 1/0 C2 decoder flag (High: When the processing C2 code is impossible
correction stage (RAS)
52 /PBCK 0 Output of VCO/2 (Normal speed = 4.3218MHz)
(Double speed = 8.6436MHz(RA6)
53 | DVSS2 Digital Ground 2
54 FSDW /O Unprotected frame Sync(RA7)
55 ULKFS /O Frame sync protection state (RA8)
56 /JIT V0 Display of either RAM overflow or under flow for +4 frome Jitter
margin (RAQ)
57 C4M /O Only Monitoring signal (Normal Playback: 4,2336MHz) (RA10)
58 C16M ie) 16.9344MHz signal outpur(RA11)
59 WE /O Terminal for test
60 ICS VO "
61 SEL1 | Mode Selection Terminal 1(H: 33.8688MHz)
(L: 16.9344MHz)
62 SEL2 | > 2(H: APLL)
(L: DPLL)
63 /SEL3 | m 3(H: CDROM)
(L: CDP)
64 /SEL4 I ‘ 4
65 TEST { Test Terminal(L: Normal operation state)
|
~ 66 EFMI | EFM Siganl input
6/ APDO1 Oo Charge Pump output for analog PLL
68 NSTAT oO The internal status output
| «69 TRCNT | Tracking counter input signal 7
70 LOCK O output signal of LKFS condition sampled PBFR/16
(If LKFS is "H", Lock is "H".
If the LKFS is sampled ":L" at least 8times by PBFR/16, Lock is "L")
71 PBFR Oo Write frame clock(Lock: 7.35KHz)
72 ~| SMEF O LPF time constant control of the spindle servo error signal
73 SMON _ O ON/OFF control signal for spindle servo __
74 DVDD2 omm Digital Vec2
75 SMPD O Spindle Motor drive (Rough control in the CLV-S mode
Phase control in the CLV-P mode)
~76 SMSD O Spindle Motor drive (Velocity control int the CLV-P mode)
71 VC001 0 Vco output signal (When the state is Lock by means of PBFR it is
8.6435MHz)
78 vcoli | VCO input signal
79 Dspeed | Double speed mode control (H: Normal speed)
(L: Double speed)
80 APDO2 16) Analog PLL charge pump output for Double speed mode
—24—