Samsung MAX-557 - Page 8

3-1-2.
KS9283
(Digital
Signal
Processor)
:
WICO2
a
Pin
no.
Symbol
vO
Description
ea
1
AVDD
1
Analog
Vcc1
2
DPDO
l
oO
Charge
pump
output
for
master
PLL
|
3___|
DPFIN
i
|__|
Filter
input
for
master
PLL
4
DPFOUT
Oo
Fiter
output
for
master
PLL
5
|
CNTVOL
|
VCO
Control
Voltage
for
master
PLL
6
AVSS1
Analog
Ground1
|
7
|
DATX
[9
Digital
audio
output
8
XIN
|
X-tal
oscillator
input
9
XOUT
oO
X-tal
oscillator
input
10
|
WDCH1
O
Word
clock
of
48
bit/SLOT
17
LRCH1
O
Channel
clock
of
48
bit/SLOT
12
ADTA1
O
Serial
audio
data
output
of
48
bit/SLOT(MSB
first)
13
DVss1
Digital
Ground1
14
BCK1
16)
Audio
data
Bit
clock
for
48
bit/SLOT
15
C2PO
|
ie)
C2
pointer
for
output
audio
data
|
16
TIM2
ie)
Normal
and
Double
Speed
Control
pin
17
/BCK1
i
O
Clock
of
BCK1
18 /BCK2 O Clock of BCK2
19
BCK2
1
O
|
Audio
data
Bit
clock
of
64
Bit/SLOT
20
LRCH2
O
Channel
clock
of
64
Bit/SLOT
21
ADATA2
0
Serial
audio
data
output
of
64
Bit/SLOT(LSB
First)
[22
N.C
No
connection
[23
|wocH2
_—«|
~——O__|
Word
clock
of
64
Bit/SLOT
EMPH
oO
Emphasis/Non-Emphasis
output
("H":
Emphasis)
[2
[urs
|
oO
|
The
Lock
status,output
of
frame
Sync
26
soOs1
oO
Outp
of
subcode
ianal
(SO
+
[RESET
—s—s'|_
sO.
__|
System
reset
at
“L"
O
SOCK
1/0
Control{"L":
internal
CK,
"H":
external
CK)
29
yO
Clock
for
outpur
subcode-Q
data
30
SQDT
O
Serial
output
of
subcode-Q
data
The
CRC
Check
result
signal
output
of
subcode-Q
I Clock for output subcode-Q data
oO Subcode Seria! data output
Digital Vcc1
{ Mute contro! input ("H": Mute ON)
| Latch signal input from Micom
! Serial clock input from Micom
I Serial clock input from Micom
VO SRAM data |/O Port 8(MSB)
/O " 7
0 7 6
VO i 5
VO : 4
/O 7 3
VO Ps 2
VO > 1 (LSB)
VO
Monitoring
output
for
C1
error
Correction
(RA1)
vO z (RA2)
VO Monitoring outpur for C2 error Correction (RA3)
/O , : (RA4)
MAX-557