Samsung SDC-30 - Page 8

Reference Information
Samsung Electronics 2-5
7. A/D converter (KAD0228) and DRAM Controller (SMA9606)
A/D converter converts the analog signal which is output from Analog processing IC to the 8-bit digital signal
(24.54Mhz). DRAM Controller is synchronized with Vsync, converts the 8-bit data which is output from A/D
converter to 16-bit data, and stores it in DRAM (controlled by the 32-bit microprocessor).
Fig. 2-5
D_OUT(15:0)
A–OUT(9:1)
RAS
CASU
CASL
WR
OE
TRI
STATE
OUTPUT
(High Z
when
Power Off)
MODE
Data Register
&
SIO
SO
SCK
SI
SCS
AD_IN(9:0)
ADCK IN(12.27MHz)
WND1 OUT
WND2 OUT
EXT VD IN
EXT HD IN
ADDR/DATA
BUS
CONTROL
VD/HD
GEN
AE Data Detect.
2 & Knee,
8bit to 16bit Convert
OE
EOC
R/B
BREQ
BACK
H ADJ
V ADJ
CLK IN(24.54MHz)
DRAM
Address
Generator
–
–
–
–
–
–
–
–
–
–
–
–