Sanyo DC-MCR300 - Page 13

- 12 -
IC BLOCK DIAGRAM & DESCRIPTION
Nor/Cro
& Hi/Lo
Logic
R
R
P
R
P
P
ALC
Mute
Mute
Logic
A/B
Logic
Rec/PB
Ripple
Rejection
Rec
Amp(L)
Rec
Amp(R)
PB Amp(L)
PB Amp(R)
A/Rec
A/Rec
B
B
1
2
3
4
5
7
6
8
9
10 1211
1314
15
16
17
1819
20
21222324
L-PB AMP
R-PB AMP
R-PB NF
R-PB EO
R-PB OUT
AB SW
R-REC OUT
R-REC IN
REC/PB SW
A/B SW
FILTER
GND
VCC
CRO/NOR
HI/LO
ALC
L-REC OUT L-REC IN
ALC
L-PB AMP OUT
L-PB EO L-PB NF R-PB AMP
L-PB AMP
IC440 AN7348K (Play /Rec Pre Amp)
IC222 TC9257F (Tuner PLL IC)
2 MODULUS
PRESCALER
4bit SWALLOW
COUNTER
POWER ON
RESET
TRI-STATE
BUFFER
TRI-STATE
BUFFER
OUTPUT PORT
ADDRESS
DECODER
OSC
CIRCUIT
PHASE
COMPARATOR
12bit PROGRAMMABLE COUNTER
20bit BINARY COUNTER
UNIVERSAL COUNTER CONTROL
REFERENCE COUNTER
24bit REGISTER
24bit SHIFT REGISTER
24bit REGISTER
MAX
1/ 2
UNLOCK
I/O PORT
TEST
GATE
AMP
AMP
AMP
OT-4
OT-4
OT-1 OT-3
OT-2 OT-4
RESET
PSC
MODE LFFM
HFFM
H
FM L
XT
1ms
1ms
OSC
4
8
24 22
10
5
5
4
4
15
12
4
DO1
I / O-5 / CLK
I / O-6
I / O-7 / SC
IN
DO2
(DO2 / OT-4)
I / O-9 / IF
IN2
(I / O-6 / IF IN2 )
I / O-8 / IF
IN1
(I / O-5 / IF IN1 )
GNDV
DD
FM IN
AM IN
XT
XT
DATA
CLOCK
PERIOD