Sanyo DP26648 - Block Diagram

— 36 —
1.5V to 3.3V 3.3 V 9 V to 12 V
2 Vrms Line Level
Left Channel
Output
2 Vrms Line Level
Right Channel
Output
Left and Right
Mute Controls
Hardware Control
Level Translator
Hardware
Configuration
PCM
Serial
Interface
Auto Speed
Mode Detect
Internal Voltage
Reference
External
Mute
Control
Interpolation
Filter
Multibit
∆∑Modulator
DAC
DAC
Multibit
∆∑Modulator
Amp
+
Filter
Amp
+
Filter
Interpolation
Filter
Reset
Serial Audio Input
IC6200, Audio DAC
1
2
3 4 5
6
8
7
SUPPLY VOLTAGE
BLOCK DIAGRAM
5μA
1.25V
N.C.
N.C.
INPUT
N.C. GND DELAY CAPACITOR
OUTPUT
5900, Voltage detecting delay circuit