Sanyo DP50747 - Page 55

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SIGNAL FLOW CHARTS (CONT.)
Video data & Clk
(LVDS)
Back Light level
DDR2
256Mbit
(400MHz)
HDMI
Rx
MPEG2
Video
Decode
Scaler
OSD
LVD S
Out
Panel Unit
Audio
Processing
Unit
Audio
DAC
NTSC
Decoder
Digital/
Analog
Tuner
CPU
(MIPS)
A-out
Audio
ADC
AA
A
A
Audio Cnt. Audio Amp.
DDR2
256Mbit
(400MHz)
SPI Flash
(32 Mbit)
Composite or S
S-Detect
Back Light cont
SW
V
I²C
I²C
I²S
VBL
Video 2 (Component)
Video 3 (Component)
RS-232C
S/P DIF
+12/5/3.3V
+12/24V
TV CPU
EEPROM
TV Speakers
Line Out
Clock (24.576MHz)
RESET
RF-IN
Video1
Video2
Video3 Audio
(or DVI Audio)
Remote
Key Switch
Power
LED
IR
Vcc cont.
UARTL/R
Audio
Audio
Selector
Video
I²C
I²C
HDMI1 (or DVI)
HDMI2
HDMI3
I²C
WHEN HDMI-2 IS SELECTED