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SEA 222 - Oscillator Systems; Phase Locked Oscillator System

SEA 222
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5.5
5.5.1
THE
PHASE
LOCKED
LOCAL
OSCILLATOR
SYSTEM
BLOCK
OIAGRA.M
Figure
5.5.1
shows
the block diagram
of
tpe
phase locked local
oscil-
lator
system of the
SEA
222.
A
two
loop system
is
used
in
the
SEA
222
consisting
of
the
high
frequency loop, operating with a 6.4
KHz
reference frequency
and
the
low
frequency loop
which
operates with a
100
Hz
reference.
The
com-
bination of
two
loops provides
100
Hz
resolution
over the high
fre-
quency
spectrum, along with reasonable loop switching
and
settling
times.
The
high frequency loop
starts
with
the
VHF
VCO
(Voltage Controlled
Oscillator).
This
oscillator
actually
consists
of
two
separate
oscil-
lators,
where
the tuning range
is
divided
into
two
approximately equal
segments.
The
use of
two
osci
11
ators,
bandswitched
by
the
control
computer, provides
good
VCO
spectral
purity
over
the
desired tuning
range
of
47
-
68
MHz.
~oth
VCOs
are
varactor
tuned
by
an
output
voltage
from
the
phase
detector
in
synthesizer
chip,
Ull.
The
signal
from
the
selected
VCO
is
buffered
and
then applied
to
the
first
signal mixer, Al. Simultaneously, a sample of
the
VCO
output
is
applied
to
the
high speed loop dual
modulus
prescaler,
U12.
The
low
speed loop
starts
with the 38.6
MHz
VCXO,
015. This
oscil-
lator
operates over
the
range
of
38.5984
to
38.6047
MHz
and
is
varactor
·tuned
by
an
output voltage
from
the
phasedetector
in synthesizer chip
Ul6.
The
VCXO
signal
is
buffered
by
Ql6
and
then applied
to
the second
signal mixer,
A2.
Simultaneously, a sample
of
the
VCXO
signal
is
applied
to
one
of the inputs of
an
HCMOS
exclusive
OR
gate. A buffered
6.4
MHz
signal
from
the
master clock osci
11
ator
is
applied
to
the
second input of the exclusive
OR
gate
which
acts
as
a harmonic mixer.
The
output signal
is
the
difference
between
the
VCXO
signal
and
the 6th
harmonic of the clock signal
at
38.4
MHz,
or approximately
200
KHz.
This
200
KHz
signal
is
filtered,
buffered
and
then applied
to
the
signal input of the
low
speed loop synthesizer chip,
U16.
From
the
above
discussion
it
may
be
seen
that
ALL
of
the interna 1
conversion
oscillator
frequencies are phase locked
to
the
6400.0
KHz
master clock
oscillator,
that
the
first
conversion
oscillator
consists
of
a
VCO
which
operates as a "coarse tuning"
oscillator
having a basic
resolution
of 6.4
KHz
and
that,
finally,
the
second conversion
oscil-
lator
operates
as
a
"fine
tuning" loop
which
tunes 6.3
KHz
in
100
Hertz
steps.
31)