Sharp FDD-412A - Page 31

(
4)
(5)
FDD412A/B
Read circuit operation
(a)
(b)
(c)
VFO
(a)
(b)
QOOO®
Read circuit operation flow
In
the
analog
waveshapes
(@
below),
each
peak
position
corresponds
to
a
flux
change
(i.e.,
data
position).
-
These
data
positions
should
be
converted
to
pulses,
as
shown
in
write
waveshapes
@)
To.do
this,
differentiation
is
first
performed
for
conversion
such
that
the
flux
change
positions
on
the
wave
intersect
the
0
level
@).
The
data
is
then
placed
in
a
comparator
(for
voltage
comparison)
and
converted
to
a
square
wave
which
is
reversed
at
intersection
points
on
the
0
level
@).
A
pulse
generator
is
then
used
to
generate
pulses
at
leading
and
trailing
edges
of
the
square
wave
This
provides
the
same
readout
data
as
in
the
write
waveshape.
1 0 1 1 0 0
@)
Write
waveshape
“fl
j
fl
fl
@)
Read
waveshape
® Differentiated
waveshape
) Square wave
G)
Pulse
waveshape
See
eee
(ee
ee
Fig.
2.23
Read
Circuit
Data
Conversion
Waveshapes
Read
amplifier
The
read
amplifier
consists
of
a
differential
amplifier
and
a
differentiation
circuit.
TP1
and
TP2
permit
differential
signals
to
be
observed
directly
for
effective
troubleshooting.
Filter switchover
The
LOW
CURRENT
signal
for
writing
is
used
as
it
is.
Because
inner
tracks
have
higehr
bit
density
than
outer
tracks,
data
resolution
is
increased
correspondingly
for
the
inner
tracks.
circuit
operation
(for
model
A
alone)
Objective
Data
bits
are
correctly
separated
from
clock
bits
in
the
read
data.
Operation
A
separation
(window)
signal
(VFO
CLOCK)
as
shown
in
Fig.
2.24
is
generated
to
gate
the
read
data
for
generation.
1 0 1 i 0 0 0 1 1
Read
data
Fak
||
aera
|
Reet:
|
SMe:
|
Weiter
|
CoOENNRD!
|
COREENEE:
|
00S
Mees a se cl lee ahd
(VFO
CLOCK)
Baa
Separated data
(SEP DATA)
Separated
clock
ee
ae
ees
eae
|
ae
(SEP
CLOCK)
Fig.
2.24
VFO
Circuit
Operation
(in
MFM
Mode)
~5—