I
I/O
-
j OUT
Segment data siqnals.
Refer to the touch control panel circuit for the relationship between signals and indicators.
Normally, one pulse is output in every synchronized signal period, and input to the anode of the fluorescent drsplax.
(RD939Al )
PIN NO. ’ 5
----i-- -~~
Auto clear terminal..
SIGNAL j ACL
I
I/O
/ IN
Signal is input to reset the LSI to the..initial state when power is supplied.
Temporarily set to “L” level the moment power is supplied, at this time the LSI is reset.
Thereafter set at “H” level.
(RD93MAZU)
PIN NO.
/ 6
SIGNAL ) CL1
1
I/O
/--
/ IN
~-- .-
Internal clock oscillation frequencv input settina.
The internal clock frequency is set by inserting the ceramic filter oscillation circuit with respect to CL2 terminal.
(RD93EA2U)
PIN NO. 1 7
1 SIGNAL j CL2
----- -?-- --~
--
Internal clock oscillation frequencv control output.
Output to control oscillation input of CL1
I
I/O
1 OUT
(RD93EAl U)
PIN NO. 1 8
~--.--
Segment data siqnal.
Signal similar to P30.
SIGNAL / P40
I
I/O
I
I OUT
(RD939A2U)
PIN NO. 1 9
__l. ~~~-~~ _. ._~~~~~.~ _.___
SIGNAL ’ TEST
~~~ ---... --1--- --.- - ..-. ~~~--
Terminal not used. Connected to VDD.
I
I/O
1 IN
(RD93KA4U)
PIN NO. j IO-13
Segment-bata signal.
Signal similar to P30.
SIGNAL / P41 -P43,P50
I
I/O
OUT
(RD939A2U)
PIN NO.
1 14
~~~ --!- - .~
SIGNAL 1 P5l
-----L- ~-~~~ - .._~ ._________._
I/O
1 IN
___- -
Terminal to change functions according to the model.
Signal in accordance with the model in operation is applied to set up its function.
(Rd93JAl U)
PIN NO.
I 15
Terminal not used.
SIGNAL ; P52
---~~-...-- -.. .~~--