Sony D-5 - Page 19

D-5/D-50
D-5/D-50
SECTION 1
OUTLINE
1-1.
Note:
A part of the circuit in this model differs depending
on the microcomputer (Old: MB88541-120M, New:
MB88541-124M) being used for IC801. These differ-
ences are indicated by ‘“‘Old”’ and “‘New”’.
BLOCK DIAGRAM
shows the circuit of the set using type
“MB88541-120M” for IC801 (D-5: up to
serial No. 104,000).
New .....shows the wiring of the set using type
“MB88541-124M” for IC801 (D-5: serial
No. 104,001 and later, D-50).
RF AMP/ SIGNAL PROCESSOR
KSS-II0A (1/2) ace
OPTICAL PICK-UP BLOCK( FOP) +sy
MUTING |
(MIRROR } |
(FEQ)
o—-O
FeO @l)
FOCUS /TRACKING /SLED SERVO
+9V
pat! DETECTOR 1c TPIS, BUFFER
a (LRCK) 2
° Q50! ia !
8
PWM CARRIER:
x GENERATOR
sto @) be TPI4
y RV503 e
DIRC °
ear: -
+9V
Ce E @
a +LEVEL -LEVEL
A) eae y site | ht
$901 Q3 | ( FRRoR Spicso2 1502 A
LASER ON Q510 2 [=
ON: THE DISC HOLDER i) } 8 >! ws =
1S
SHUT.
Lh
©)
ee
b
O
+5V
\———
BIAS
LEVEL]
SETTING
—%
MATIC POWER = a
AUTOMATI Pa
i — ch || =
oe a ere ‘ape Apc H Ke ees
D/A CONVERTER rae SLO ieee He] (SLO, 9 Int 1650
1¢301
J
.
Ts
>
(PLL) Used during focus search, [2
LOWPASS FILTER SAMPLE eae 6)—) informs of just focus.
1C102, FLIO! HOLD INTEGRATOR 7p >
Icio
Oe
}
ICO
g
@
DAIO.
G7)
Tae
CRCK
|
Ss
({LRCK)
TP28
505
a (12-0 d MOS)
CONS | Used during 1 track jump.
@) CLV SERVO
LOWPASS FILTER SAMPLE 4 1€603, 604 system contro. for |LCD drive
1C202 , FL201 LO
C201,» ° 4
Ge (80) LRCK x TP47
Gyto!”
=
icso9
1509
(FOK)
DIGITAL SIGNAL u >s J >= Y
35.002MHz PROCESSOR/ 14
sf CLV SERVO System bus
it] 1C60I
53 SUB-O DATA x
ceed ii signal for input. cLocK HG
TATCH r<
oO RESET re P3 (RESET)
-————-
vco
oa
SUBQ
CHECK
oe)
SENSE
ORS
(SENSE)
=
() ; CIRCUIT ! 2 = Laser APC ON, CLV
iar ae 1p oe N servo ON at ‘"H”. Tp o@c
TP3I OF WFCK) GG
1C604 Fieve 1603: Tite ie ee
i SCOR) we) SLED servo
>
PWM DRIVE
COMPARATOR
(Focus)
OPTICAL
PICK-UP
BLOCK
10
{C504
J
F®
Ge.
{FO
FOCUS
COIL
AND!
TRACKING COIL
RESISTANCE
VALUE :
APPROX. 8.
I®
a TRACKING
> COIL
ro
TO
SLED SWITCH
Q506
+5V
YY
PWM DRIVE (SLEO)
1¢508
PWM
COMPARATOR
505
M902
SLED
VS
Ic509
>$
1C509
9 > 10.
qd
FLYWHEEL CIRCUIT
ae
—— ey
=
9802 I
i ) FORMER
|
CLOCK IS MOTOR
cLv A
Q309 Q308
ON = OFF
DC-DC converter is on when "L"’.
' QQ
4 a |
1P35 : ouit ij ayer
Ey eee E aT “H” during CLV servo lock. Canoes) oa drive circuit ison when “L', —— BRAKE MUTING —~
= eure
TP34 MIRR7) Co G)RI3 (S-OPEN) cRVERS = sag Detects FOP arrival at inner circumference at “’L”.
(RFCK) & $902 Nas = L< d LIMIT
(26)RF CK muTa9) +5V OPEN CLOSEW—© —fl2_ 63) of (are REACHES }
OrPs4iR
our)
DaTHe
wiser
(S=LIMIT)
7)
THE
INNER
POSITION.)
@
30!
3
rex
x14064)-—
D801
(rowers
SHUT,
BATTERY
LEVEL
CHECK
LINE OUT @5)WFCK & er Mie Muting when “H”. Ti ee RIPPLE FILTER ate VOLT. REG
ML OUT) DE-EMPHASIS XTAl 0 MUTG cS +9V Q507 YSTEM 1C802
HE ADPHONE S 1304.45 pexi@ Thee PEN a o, BATT voltage drop CONTROL,
TP5I AMP (0) a I: detection. MUTING SECTION
{L gut) : $904 iar | OVA CONVERTER, i VOLT. REG
TP49 ANALO! Q301 ~
ae, ms GE <i ‘Gece
(HEADPHONES) Deemphasis pelts ==. eAT EN © 1p37
+
‘f
MODE
K2
(K-
MODE)
(BATT2)
DIGITAL
SIGNAL
VOLT.
REG
applied... Fee pa PROCESSOR , RAM +5V 0601 — 603 DC-DC CONVERTER
swnen when “H". Sac START ( K -PB) SECTION oo
HE AD PHONE C305 e-EMPHASIS m/l —_—_ .
MUTING ic304 43 mE (PLAWPAUSE) HUCK SPBCPAUSE | BATT EMP detection. SE&¥9 ORNE gy To
|
Pour) a a 55 F RF AMP, SIGNAL PROCESSoR,| +5V
7 lek BIT RAM a (FFD 68) KO(KFF as SERVO AMP,HEADPHONE AMP | —5y eae
1c602 Ba POWER ON/OFF SECTION
Qo -G) ze ree raat SWITCH
0 ie RIS(K 0307 iad)
? o —> Pies
see) RI4 (K- STOP) y Benes PRODUCE
HEADPHONE i,
MUTING @)) ac
7"
™
INVERTER
SWITCH
.
24
—?
3—-
2
Reset
signal
input
for
each
section.
Detects
state
of each
switch: