ST7735R
V0.2 81 2009-08-05
Table 10.1.3 System Function command List (3)
Instruction
Refer
D/CX
RDXD17-8
D7
D6
D5
D4
D3
D2
D1
D0
Hex
Function
0
↑
1
- 0 0 1 1 0 0 0
0
(30h)
Partial start/end address set
1
↑
1
- PSL15
PSL14
PSL13PSL12
PSL11
PSL10 PSL9
PSL8
1
↑
1
- PSL7
PSL6
PSL5
PSL4
PSL3
PSL2
PSL1
PSL0
Partial start address (0,1,2, ..P)
1
↑
1
- PEL15
PEL14
PEL13PEL12
PEL11
PEL10 PEL9
PEL8
PTLAR
10.1.24
1
↑
1
- PEL7
PEL6
PEL5
PEL4
PEL3
PEL2
PEL1
PEL0
Partial end address (0,1,2, .., P)
TEOFF
10.1.25
0
↑
1
- 0 0 1 1 0 1 0
0
(34h)
0
↑
1
- 0 0 1 1 0 1 0
1
(35h)
Tearing effect mode set & on
TEON 10.1.26
1
↑
1
- - - - - - - - TEM
Mode1: TEM=”0”
Mode2: TEM=”1”
0
↑
1
- 0 0 1 1 0 1 1
0
(36h)
MADCTL
10.1.27
1
↑
1
- MY
MX
MV
ML
RGB
MH
- -
IDMOFF
10.1.28
0
↑
1
- 0 0 1 1 1 0 0
0
(38h)
IDMON
10.1.29
0
↑
1
- 0 0 1 1 1 0 0
1
(39h)
0
↑
1
- 0 0 1 1 1 0 1
0
(3Ah)
COLMOD
10.1.30
1
↑
1
- - - - - - IFPF2
IFPF1IFPF0
0
↑
1
- 1 1 0 1 1 0 1
0
(DAh)
1
1
↑
- - - - - - - - -
RDID1
10.1.31
1
1
↑
- ID17
ID16
ID15
ID14
ID13
ID12
ID11
ID10
0
↑
1
- 1 1 0 1 1 0 1
1
(DBh)
1
1
↑
- - - - - - - - -
RDID2
10.1.32
1
1
↑
- 1 ID26
ID25
ID24
ID23
ID22
ID21
ID20
0
↑
1
- 1 1 0 1 1 1 0
0
(DCh)
1
1
↑
- - - - - - - - -
RDID3
10.1.33
1
1
↑
- ID37
ID36
ID35
ID34
ID33
ID32
ID31
ID30
“-“: Don’t care
Note 1: After the H/W reset by RESX pin or S/W reset by SWRESET command, each internal register becomes default state (Refer
“RESET TABLE” section)
Note 2: Undefined commands are treated as NOP (00 h) command.
Note 3: B0 to D9 and DA to F are for factory use of driver supplier.
Note 4: Commands 10h, 12h, 13h, 20h, 21h, 26h, 28h, 29h, 30h, 33h, 36h (ML parameter only), 37h, 38h and 39h are updated during
V-sync when Module is in Sleep Out Mode to avoid abnormal visual effects. During Sleep In mode, these commands are updated
immediately. Read status (09h), Read Display Power Mode (0Ah), Read Display MADCTL (0Bh), Read Display Pixel Format
(0Ch), Read Display Image Mode (0Dh), Read Display Signal Mode (0Eh).