Technics SL-P222A - Page 17

e 1501 (AN8371S): Data slice and PLL
VEE
SRF
,
fs] 2} 2] S| ~fele[+] «| |-|
v </|<!|< C D/O | >
Le)
e1C801 (MN6471): Digital filter and D/A converter
Command load input (load: L)
Not used, connected to GND
TEST terminal
Power supply (connected to +4.7V)
ite)
Division
MLD
RSTB
EST1
7 EST2
VDD4 >|zi2z}ialalalta
01] 6 Z| 2
11 OUTL (-) Lch data output, (—) terminal
[aor
Rch data output, (—) terminal
VSS4
13 VSS3
Ui
=
a
>| z
o)
14 | OUTL (+)
15 VDD3
li
17 | AVDD2
18 | OUTR (+)
vss2
VSS1
OUTR (-)
0
Division
Power supply (connected to —5V)
Een Sliced RF signal
Modulation data
ete Y GND terminal (digital system)
PCK PLL extract clock (4.2336MHz)
vcc az Power supply (connected to +5V)
VCO free run frequency adjusting
current input (Not used, open)
Capacitor connection for VCO
oscillator frequency
Resistor connection for VCO
oscillator frequency
Capacitor connection for PLL DO
protection
PLL loop filter connection
Fie)
Division
PLL loop filter connection
Pot PLL frequency comparison signal
a es
| oo | RF signal output with AGC output
ee
detection input
1 ier titer er AS comneced |
Slicing level control signal input
(Not used, connected to GND)
le
rc LS)
n Uv oO
D nN
> 2D n
>
Q fo)
> -GND
Filter capacitor for data slicer
connected
Filter capacitor for data slicer
connected
= = af oa =
= o N Oo; an wo
> (o)
nT
e
LS)
vo
Division
28 | DVDD2 wily Power supply (connected to +4.3V)
29 | DVSS2 Pat GND terminal (digital system)
0 Sub-strate terminal
(Not used, connected to +4.3V)
Zero input detector terminal
32 192fs ie) 192 fs (8.4672 MHz)
LR clock selector (Not used,
33 | LRPOL i connected to +4.3V)
34 | LRCLK ie | LR discrimination signal input
peck | ot Serial bit clock input
Serial data input (MSB first)
GND terminal (digital system)
Power supply (connected to +4.3V)
384 fs (16.9344MHz) output
Power down terminal
(Not used, connected to GND)
Mode control data
Data clock for MDATA
pe
m BLOCK DIAGRAM
Ac
IN
“ 5 POWER +6V
TRANSFORMER) ~
+5v
BO-B3
DAC
DODS
D1-D4
FE lag
HF
HFD
HF-in
LM
LO
RE
RE1
RE2
OPTICAL PICKUP UNIT
HF in/DI~D4
SERVO CIRCUIT
! 4
POWER SUPPLY CIRCUIT
ee 06 ce ce 06 86 08 08 oe ee oe ee
FOCUS MOTOR
RADIAL MOTOR
ee
LASER DIODE
LASER
POWER
ADJ.
VR3520
PHOTO
DIODES
(4X)
Kee hea} 01 1~16,891,892
POWER
SUPPLY
+ ae
2 wn Sy
Control bits for radial circuit.
Current output for track jumping.
(Digital to Analogue Converted)
Drop out detector supression.
Photodiode currents.
Focus error signal.
Focus error signal for LAG network.
HF output for DEMOD.
HF detector output for DEMOD.
HF current input.
Laser monitor diode input.
Laser amplifier current output.
Radial error signal (amplified RE2
-RE1 currents).
Radial error signal 1 (summation of
amplified currents D3 and D4).
Radial error signal 2 (summation of
amplified currents D1 and D2).
FOCUS
OFFSET AD.
VR3569
FOCUS DRIVE
<q
RADIAL DRIVE
= 4G
J.
+5V =A - 5
TY) 0351353
TURNTABLE
MOTOR
CONTROL
AN837!
DATA SLICE & PLL
HF/RE
C6501
TDABBOBT !
PHOTO DIODE
SIGNAL PROCESSOR
FE/
FElog Rel Re2 TL PLLH RD
1C 404
TRACK LOSS DET.
5.
TDOA8809T ceuaat ea |
RADIAL ERROR SIGNAL
PROCESSOR
BO~3
DW 4
RE dig/X1
TRAY SW_ POL
!
| — = _
TRAY SW
ao ae |
'
RE dig : Radial error digital.
RE lag : Radial error signal for LAG network
RPU : Radial puls after track jumping.
Si/RD : On/off control for laser supply and
focus circuit.
TL : Track loss signal.
Div4 : Radial error digital devided by four.
RF : Data
DO : Drop-out detection signal (Active High)
SRF : Sliced RF signal.
EFM : Modulation data.
PCK : PLL extract clock (4.2336MHz)
FPC : PLL frequency comparison signal
STAT : Status command for CRC etc.
DMUTE : Data mute command
MDATA : Mode control data
MLD : Load command for mode control data
(Active Low)
RESET SIGNAL
GENERATOR
HFD = Si/ DODS STAT
RD
SPO~3
1C 403)
MNISSIPUF -1
PERIOD DET &
SPEED CONTROL
TEER 05:
MCLK
SUBQ
CLDCK
BLKCK
RST
TRON
EC
PC
SMCK
OE
WE
LRCK
SRDATA
SCK
MEMP