Technics SL-P250 - Page 11

Mi TERMINAL FUNCTION OF LSI
@ MN6617S (Digital Signal Processing: EFM Decoder, Error Correction, CLV Servo)
vo fie)
Division Division
Sub-code block (Q data) clock RESY Resynchronizing signal
(75 Hz) (Not used, open)
Sub-code frame (Q data) clock FCLV Synchronizing detection signal
(7.35 kHz) (Not used, open)
Sub-code (Q data) output Interpolation flag for each byte
IPBYTE
(Not used, open)
Sub-code (Q data) CRC check
(Not used, open) Interpolation prohibited
Peet (Not used, connected to GND)
LAGS C2 decoder correction flag 3
| (Not used, open)
LAG4 C2 decoder correction flag 2
(Not used, open)
LAG3 C2 decoder correction flag 1
(Not used, open)
FLAG2 C1 decoder correction flag 2
{Not used, open)
4 FLAG1 C1 decoder correction flag 1
(Not used, open)
FLOCK Ea Crystal frame clock
16K RAM data output
RAMOE | 0 | 16K RAM OE signal
| 52 | RAMWE ks 16K RAM WE signal
ry Bera 16K RAM address signal
63 RAMA10 ({(RAMAO: LSB, RAMA10: MSB)
pea [pc =| oo Spindle motor ON signal (ON at “L”)
88: EG <= 4h ON] Spindle motor drive signal
FG Spindle motor FG signal input
(Not used, open)
VCNT | — | {Not used, open)
| 68 | REXT | — | (Not used, open)
PCKO | — | (Not used, open)
}73 |voo =| ot Power supply (connected to +5V)
7 cLvs 11T servo OK signai (OK at “H”)
(Not used, open)
| 7a {rec 8 =6{| 0 PLL frequency comparision signal
79 BSSEL PLL frequency in take operation
signal. (Not used, open)
SRF (Not used, open)
SUBC Sub-code serial output data
(Not used, open)
Clock for sub-code serial output
(Not used, open)
1
i?) (3)
3 K
ra)
x
QO += Lo]
Qa
x
Reset signal input (reset at “L”)
Pe] nH
4
Command load input 37
(
_
i=}
Command clock input
= DATA Command data input
n
Muting control
(Not used, connected to GND)
mui
4 a|) & 9 Cc z a
m
Tracking servo ON signal
(tracking servo ON at “L”)
Processing condition (CRC, OTC,
CLVOK, TT STOP) output
Clock output (4.2336 MHz)
Pitch control clock output
a fee | (NOt used, open)
ITC Track counter input signal
(Not used, open)
= Test mode selection
ps fm] | (Not used, connected to #8)
DA output parallel/serial selection
SEL (serial at “L”)
(Not used, connected to GND)
t channel deglitch signal/serial
ERG Pe zs data word clock. (Not used, open)
Clock signal output for spindle
motor control (Not used, open)
11 TAT
= [e) rE xz
n on
=
2)
xz
De-emphasis ON signal
(de-emphasis ON at “H”)
(Not used, open)
Interpolation fiag (interpolation at
ETEAG “H”) (Not used, open)
Error flag (error at “H”)
(Not used, open)
16K RAM address reset signal
(reset at “H”) (Not used, open)
Clock (16.9344 MHz) output
(Not used, open)
BO «| Serial data output (MSB first)
Serial data output (LSB first)
(Not used, open)
Serial data beat clock.
Serial data word clock (Not used)
Serial data byte clock
(Not used, open)
GND terminal
R/L signal
LAG6
nial] 3s
5
2 °
27
# |zig/ 2 [g/l x
o
318/88) £)2)] 4 x | * 2 13
> | >
< <
Ps) i?)
=
nN
oo
SL-P250
@ AN8370S (Optical Servo Control)
|e | otn | Paetin
Division
pt [vee | __| Power supply (connected to -5¥) _|
[2 [tsa || Phasecitterence mput(a) |
[GND termint
vo
Division
CNT2
CNT3
CNT4
F.LOCK
27 | C.FBDO
C.SBDO
C.SBRT
Control input
(TRON Tracking servo ON signal)
Control input (KICKF Kick direction
[Foward] command)
Control input (KICKR Kick direction
[Reverse] command)
Focus lock signal output
Pir
n
TEOUT
Capacitor connection for inversion
RF high detection
Capacitor connection for inversion
RF low detection
E(+)
Phase difference to voltage
conversion (+)
Phase difference to voltage
conversion (—)
Laser power inversion input
Capacitor connection for phase
difference memory
Trackcrossing speed control output
(Not used, open)
Capacitor connection for
non-inversion RF stow detection
E(-)
PC(-) - ;
Capacitor connection for
iwc non-inversion RF fast detection
-MEM
F OUT RF signal output
Lo
>
o];>|/ 4a] ala
m fo)
PC(+)
REFE
Drop-out detection output
33 RF signal input
Focus search signal output
eo) zie ° G|z/°
Capacitor connection for triangular
= wave generation
° = =
17
PCNT
E.OUT
Focus
error
signal
output
Trackcrossing reference speed
setting capacitor connection
(Not used, open)
Focus error gain adjusting input
r7)
N
Focus error comparison voltage
generation
fe) 2 \z <
= = 2 a
z| oO
o| > R| om
Auto focus timer capacitor
connection
Track kick signal output
Power supply (connected to +5V)
Control input
(FOON Focus servo “ON” signal)
19
Photo detection current input (B)
Current/voltage conversion (B)
= uv mT
i=)
< [?) fe)
Current/voltage conversion (A)
pry < >
Photo detection current input (A)
v oC >
iy
Zz
=|
=
@ AN8371S (Data slice and PLL)
Power supply (connected to —5V)
0
Division
Wo
Division
PLL loop filter connection
Frequency comparison error signal
input
RF signal output data-sliced into
digital value
EFM signal output synchronized
with PCK
GND terminal (digital system)
Clock output extracted from SRF
Power supply (connected to +5V)
VCO free run frequency adjusting
current input (not connected)
Capacitor connection for VCO
oscillator frequency
Resistor connection for VCO
oscillator frequency
Capacitor connection for PLL DO
protection
PLL loop filter connection
RF signal input
'
r Ls)
RF signal output with AGC output
ARF signal input for AGF drop-out
detection input
Loop filter for AGC co mected
es) ial
<| vu m 1°2) <
ag; 0 nN ] m om ms = n m
Drop-out detection puls & output
<
r
GND terminal (analog system)
g/2/3/3| 2
8
RF signal input for data slicing
Slicing level controt siysnal input
Filter capacitor for dala slicer
connected
Filter capacitor for daig_ slicer
connected
a
im
(o)
PL1