Texas Instruments 99/4A - Page 29

TMS 9900 -
ARCHITECTURE
Product Data Book
2.8 TMS 9900 P1N DESCRIPTION
Table 2 defines the TMS 9900 pin assignments and describes the function of each pin.
TABLE 2
TMS 9900 PIN ASSIGNMENTS ANO FUNCTIONS
SIGNATURE
PIN
I/O
DESCRIPTION
TMS 9900 PIN ASSIGNMENTS
ADDRESS BUS
v B B 1 ci
Hx 64 h 3 l D
A0 (MSB)
24
OUT
AO through A14 comprise th* address buu
Vee 1 3
03 63 MEMEN
Al 23
OUT
This 3-state but provides the memory-
WAIT 3 CO
03 62 READY
A2
22
OUT
address vector to the extemaLmemory
LO a D 4 CO
C3 61 W?
A3 21
OUT
system when MEMEN is active and I/O-bit
HOLDA S CO
i: 60 CRUCLK
A4 20
OUT
addresses end external-instruction addresses
RESET 6 ci
is 59 Vcc
AS
19
OUT
to th* I/O system when MEMEN is inactive.
IAO 7 CO
03 51 NC
A6
18
OUT
The address bus assumes the high-imp-dance
Pl B C
03 57 NC
A7
17
OUT
state when HOLDA is active.
♦2 9 CO
is 56 D15
A8
16
bur
A14 10 ci
Ex55 D14
A9
15
OUT
A13 11 CO
is 54 D13
A10
14
OUT
A12 12 Kb
03 53 D12
A11
13
OUT
A11 13 CO
03 52 011
A12
12
OUT
A10 14 CO
------------------------ i: 51 010
A13
11 OUT
A9 15 CQ
02 50 09
A14(LSB) 10
OUT
Al 16 Kp
03 49 db
A7 17 CO
03 « ° 7
DATA BUS
A6 18 CO
P3 47 DC
00 (MSB)
41
I/O
DO through 015 comprise the bidirectional
A5 19 Kp
------------------------ > 06
01
42
I/O
3-«tete data bus. This bus transfers memory
A4 20 CO
CX 46 04
02
43
I/O
data to (when writing) and from (when
A3 21 ci
03 44 03
03
44 I/O
reading) the external-memory system when
A2 22 CO
tx 43 02
04
45
I/O
MEMEN is active. The data bus assumes the
A1 23 CO
EX<2 01
D5
46
I/O
high-impedance state when HOLDA is
AO 24 C±
fcx 41 DO
Dfi
47
I/O
active.
•4 25 ci
P 40 Vss
07
48 I/O
Vss 26 CO
LX 39 NC
08
49 I/O
VDO 27 g
KZX 38 NC
D9
50 I/O
43 28 CO
ic 37 NC
010 51
I/O
DBIN 29 CO
03 36 ICO
Oil
52
I/O
CRUOUT 30 CO
gS 35 IC1
012
53
I/O
CRU1N 31 CO
i*34 IC2
013
54
I/O
iNTRtO 32
____________________ is 33 IC3
014 ,
55
I/O
015 (LSB)
56 I/O
NC — No Internal eonneet»«n
POWER SUPPLIES
V BB
1
Supply voltage (-5 V NOMI
v C c
2^9
Supply voltage (5 V NOM). Pins 2 and 59 must be connected in
parallel.
v do
27
Supply voltage (12 V NOM)
v ss
26.40
Ground reference. Pins 26 and 40 must be
connected m parallel.*
CLOCKS
01
8
IN
Phase-1 dock
02
9
IN
Phase-2 dock
03
28
IN
Phese-3 dock
25
IN
Phase-4 dock
Fig. 4
21