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Texas Instruments 99/4A - Page 64

Texas Instruments 99/4A
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INTERRUPT
INTERFACE
A
block
diagram
of
the
interrupt
control
section
is
shown
in
-Figure
24,
p.
61.
The
interrupt
inputs
(6
dedicated
(INTI
—
INT6),
and
9
programmed
1
e
)
are
sampled
on
the
-Falling
edge
of
0.3
and
latched
onto
the
chip
-For
one
03
inverted
(interrupts
are
active
low)
and
ANDed
with
its
respective
mask
bit
(mask=l,
interrupt
enabled).
On
the
rising
edge
o-F
03,
the
prioritizer
and
encoder
senses
the
masked
interrupts
and
produces
a
-Four-bit
prioritized
code
and
INTREO
are
latched
off
chip
with
a
SYNCLATCH
on
the
falling
edge
of
the
next
03,
which
ensures
proper
synchronization
to
the
processor.
The
interrupt
mask
bits
on
the
TNS
9901
PSI
are
individually
set
or
reset
under
software
control
.
Any
unused
interrupt
line
should
have
its
associated
mask
disabled
to
avoid
false
interrupt:
to
do
this,
the
control
bit
(CRU
bit
zero),
is
first
set
to
a
zero
for
interrupt
mode
operation.
Writing
to
TNS
9901
CRU
bits
1-15
indicates
the
status
of
the
respective
interrupt
inputs;
thus,
the
designer
can
employ
the
unused'
(disabled)
interrupt
input
lines
as
data
inputs
(true
data
in).
INPUT/CUT
INTERFACE
A
block
diagram
of
the
TNS
9901
I/O
interface
is
shown
in
figure
23,
p.60.
Up
to
16
individually
controlled
I/O
ports
are
available
(seven
dedicated,
P0
—
P6,
and
nine
programmable)
and
as
discussed
above,
the
unused
dedicated
interrupt
lines
also
can
be
used
as
input
lines
(true
data
in).
Thus
the
TNS
9901
can
be
configured
to
have
more
than
16
inputs.
RST
1
or
RST2
(command
bit
)
is
executed.
An
output
port
can
be
read
and
indicates
the
present
state
of
the
pin.
A
pin
programmed
to
the
output
mode
cannot
be
used
as
an
input
pin:
applying
an
input
current
to
an
output
pin
may
cause
damage
to
the
TNS
9901.
The
TNS
9901
outputs
are
latched
and
buffered
on
chip,
and
inputs
are
buffered
onto
the
chip.
The
output
buffers
are
NOS-TO
TTL
buffers
and
can
drive
two
standard
TTL
loads.
PROGRANNABLE
PORTS
A
total
of
nine
pins
on
the
TNS
9901
are
user
programmable
as
either
1/0
ports^.or
interrupts.
These
pins
will
assume
all
char
ac
t
er
i
st
i
cs
of
the
type
pin
they
are
programmed
to
be.
Any
pin
which
is
not
being
used
for
interrupts
should
have
the
appropriate
interrupt
mask
disabled
(mask=0)
to
avoid
erroneous
interrupts
to
the
CPU.
To
program
one
of
the
pins
as
an
interrupt,
its
interrupt
mask:
simply
is
enabled
and
the
line
may
be
used
as
if
it
were
one
of
the
dedicated
interrupt
lines.
To
program
a
pin
as
an
1/0
port,
disable
the
interrupt
mask
and
use
that
pin
as
if
it
were
one
of
the
dedicated
I/O
ports
.

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