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Texas Instruments TMS320C67X - Page 228

Texas Instruments TMS320C67X
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MPYSPDP Multiply Single-Precision Value x Double-Precision Value (C67x+ CPU)
3-168 Instruction Set SPRU733
Multiply Single-Precision Floating-Point Value Double-Precision
Floating-Point Value
MPYSPDP
Syntax MPYSPDP (.unit) src1, src2, dst
.unit = .M1 or .M2
Compatibility C67x+ CPU only
Opcode
31 292827 2322 1817 131211 76543210
creg z dst src2 src1 x 0 1 0 1 1 0 1 1 0 0 s p
3 1 5 5 5 1 1 1
Opcode map field used... For operand type... Unit
src1
src2
dst
sp
xsp
sp
.M1, .M2
Description The single-precision src1 operand is multiplied by the double-precision src2
operand to produce a double-precision result. The result is placed in dst.
Execution if (cond) src1 src2 dst
else nop
Notes:
1) If one source is SNaN or QNaN, the result is a signed NaN_out. If either
source is SNaN, the INVAL bit is set also. The sign of NaN_out is the
exclusive-OR of the input signs.
2) Signed infinity multiplied by signed infinity or a normalized number (other
than signed 0) returns signed infinity. Signed infinity multiplied by
signed 0 returns a signed NaN_out and sets the INVAL bit.
3) If one or both sources are signed 0, the result is signed 0 unless the other
source is NaN or signed infinity, in which case the result is signed
NaN_out.
4) A denormalized source is treated as signed 0 and the DENn bit is set.
The INEX bit is set except when the other source is signed infinity, signed
NaN, or signed 0. Therefore, a signed infinity multiplied by a denormal-
ized number gives a signed NaN_out and sets the INVAL bit.
5) If rounding is performed, the INEX bit is set.

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