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Texas Instruments TMS320C67X - Page 366

Texas Instruments TMS320C67X
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Functional Unit Constraints
Pipeline4-34 SPRU733
4.3.1 .S-Unit Constraints
Table 418 shows the instruction constraints for single-cycle instructions
executing on the .S unit.
Table 418. Single-Cycle .S-Unit Instruction Constraints
Instruction Execution
Cycle 1 2
Single-cycle RW
Instruction Type
Subsequent Same-Unit Instruction Executable
Single-cycle
DP compare
2-cycle DP
ADDDP/SUBDP
ADDSP/SUBSP
Branch
Instruction Type
Same Side, Different Unit, Both Using Cross Path Executable
Single-cycle
Load
Store
INTDP
ADDDP/SUBDP
16 × 16 multiply
4-cycle
MPYI
MPYID
MPYDP
Legend: = E1 phase of the single-cycle instruction; R = Sources read for the instruction; W = Destinations written for the
instruction;
= Next instruction can enter E1 during cycle