Functional Unit Constraints
4-35PipelineSPRU733
Table 4−19 shows the instruction constraints for DP compare instructions
executing on the .S unit.
Table 4−19. DP Compare .S-Unit Instruction Constraints
Instruction Execution
Cycle 1 2 3
DP compare R RW
Instruction Type
Subsequent Same-Unit Instruction Executable
Single-cycle Xrw
DP compare Xr
2-cycle DP
Xrw
ADDDP/SUBDP
Xr
ADDSP/SUBSP
Xr
Branch
†
Xr
Instruction Type
Same Side, Different Unit, Both Using Cross Path Executable
Single-cycle Xr
Load Xr
Store
Xr
INTDP
Xr
ADDDP/SUBDP
Xr
16 × 16 multiply
Xr
4-cycle
Xr
MPYI
Xr
MPYID
Xr
MPYDP
Xr
Legend: = E1 phase of the single-cycle instruction; R = Sources read for the instruction; W = Destinations written for the
instruction;
= Next instruction can enter E1 during cycle; Xr = Next instruction cannot enter E1 during cycle-read/
decode constraint; Xrw = Next instruction cannot enter E1 during cycle-read/decode/write constraint
†
The branch on register instruction is the only branch instruction that reads a general-purpose register
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