EasyManua.ls Logo

Texas Instruments TMS320C67X - Page 368

Texas Instruments TMS320C67X
465 pages
Print Icon
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
Functional Unit Constraints
Pipeline4-36 SPRU733
Table 420 shows the instruction constraints for 2-cycle DP instructions exe-
cuting on the .S unit.
Table 420. 2-Cycle DP .S-Unit Instruction Constraints
Instruction Execution
Cycle 1 2 3
2-cycle RW W
Instruction Type
Subsequent Same-Unit Instruction Executable
Single-cycle Xw
DP compare 
2-cycle DP
Xw
ADDDP/SUBDP
ADDSP/SUBSP
Branch

Instruction Type
Same Side, Different Unit, Both Using Cross Path Executable
Single cycle
Load 
Store

INTDP

ADDDP/SUBDP

16 × 16 multiply

4-cycle

MPYI

MPYID

MPYDP
Legend: = E1 phase of the single-cycle instruction; R = Sources read for the instruction; W = Destinations written for the
instruction;
= Next instruction can enter E1 during cycle; Xw = Next instruction cannot enter E1 during cycle-write
constraint