THOMSON 42M61NF21 - Page 29

MT8206
PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL, NO DISCLOSURE
June, 2006
Item Symbol Pin # Type Description
3) Monitored pin
22 UP3_1 B7 I/O
2mA, works in stand-by mode
1) GPIO (default, input in initial state)
2) UP31
3) Monitored pin
23 UP3_5 C7 I/O
2mA, works in stand-by mode
1) GPIO (default, input in initial state)
2) UP35
3) Monitored pin
FCI Interface (3)
1 FCIDAT T3 I/O
2~16mA, SR, PU(optional), PD(optional)
1) GPIO (default, input in initial state)
2) SDIO in ms mode or DAT0 in SD mode
2 FCICLK T1 O
2~16mA, SR
1) GPIO (default, input in initial state)
2) MSCLK in ms mode or SDCLK in SD mode
3 FCICMD T2 I/O
2~16mA, SR, PU(optional), PD(optional)
1) GPIO (default, input in initial state)
2) BS in ms mode or CMD in SD mode
Dram Interface (60)
1 DQ0 AB1 I/O dram data bus bit 0
2 DQ1 AB2 I/O dram data bus bit 1
3 DQ2 AB3 I/O dram data bus bit 2
4 DQ3 AB4 I/O dram data bus bit 3
5 DQ4 AC1 I/O dram data bus bit 4
6 DQ5 AC2 I/O dram data bus bit 5
7 DQ6 AC3 I/O dram data bus bit 6
8 DQ7 AC4 I/O dram data bus bit 7
9 DQ8 AF1 I/O dram data bus bit 8
10 DQ9 AE2 I/O dram data bus bit 9
11 DQ10 AF2 I/O dram data bus bit 10
12 DQ11 AE3 I/O dram data bus bit 11
13 DQ12 AF3 I/O dram data bus bit 12
14 DQ13 AD4 I/O dram data bus bit 13
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