MT8206
PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL, NO DISCLOSURE
June, 2006
DDR / SDR Interface
The DDR / SDR interface of MT8206G can support varied kinds of DRAM. The ROW bit number is no more than 12; the
column number is 8, 9, or 10bit; and the bank bit is 1/2 bits (2 or 4 banks).
The following is the DRAM support list:
Size DRAM FW/PCB
128MX2 DDR 8MX16X2 Support
128M DDR 8MX16X1 Support
128M
DDR 4MX32X1 Support but not ready
128MX2
SDR 8MX16X2 Support
128M
SDR 8MX16X1 Support
128M
SDR 4MX32X1 Support but not ready
64MX2
SDR 4MX16X2 Support
64M
SDR 4MX16X1 Support
64M
SDR 2MX32X1 Support but not ready
16MX2
SDR 1MX16X2 Support
16M
SDR 1MX16X1 Support
The compatible DRAM types are –5 or –6, and the maximum speed is 175MHz (for ESMT –5 and MOSEL –5).
9. Layout Guide
9.1 PCB LAYER
Board Stack up
Outer Layer 0.5 oz
Inner Layer 1.0 oz
H
Fig. 1-1 PCB Stackup – 4 Layers
P.P
FR 4
The outer layers of the PCB were designated to the mainly signal routings by default, and
normally were chosen to have the 0.5 oz Cu foil with plated 0.5 oz copper, and the inner layers
was designated to be 1.0 oz at the PCB manufacturing step.
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