Vector 4 - Page 64

VECTOR 4
TECHNICAL INFORMATION
SECTION III - OVERVIEW OF THE VIDEO SYSTEM
Summary: The Video System consists of several groups of circuitry.
This circuitry is used to create several different types of video
displays. These include a standard alphanumemc mode and an advanced
graphics capability.
The Video System is described by referencing the following blocks (subsystems) from
the SBC Block Diagram and Schematic.
Bloeck
Diagram
Number(s)
27
28
30
33
39
38
40
42
43
44
45
09-01-82
Schematic
Notation
C1
C7
C2
C12
C6
c8
C9
c3
C4
CS
Cl1
Subsystem
Description
Video Controller: The 6545A-1 Chip which generates
video addresses and control signals.
Gray/Color Decoder: Generates clocking pulse for 160
and 320 graphic modes.
Yideo MUX: Multiplexes addresses generated by Video
Controller.
Graphie Mode Shift Registers: Loads RAM data during
the VIDEO Cycle if system is operating in the Graphic
Mode. i.e. Pixel display is individually programmed.
320 Mapping RAM: Provides new set of addresses for 320
extended graphic modes.
Yideo Bit MUX: Multiplexes signals from the Graphic
Mode Shift Registers or the 320 Mapping RAM.
Yideo Eit Lateh: Latches in data from Video Bit MUX.
Yideo MUX IL.ateh: Latches RAM data during the VIDEO
Cyecle 1f the system is operating in the Alpha Mode. i.e.
Pixel data coming from Character Generator PROMs.
Character Generators: Can store two character sets.
Alpha Mode Shift Registers: Shifts output of Character
Generators.
4-Bit D/A: Changes a 4-bit digital signal into an analog
signal.
7200-0001 I 3-1