Hardware Setup 2-17
(10). System Management Bus Headers
This header is reserved for system management bus (SM bus). The SM bus is a specific implementation
of an I
2
C bus. I
2
C is a multi-master bus, which means that multiple chips can be connected to the same
bus and each one can act as a master by initiating a data transfer. If more than one master simultaneously
tries to control the bus, an arbitration procedure decides which master gets priority.
IS7-G/IS7/IS7-E:
IS7-M: IS7-E2/IS7-E2G/IS7-E2V: IS7-V2:
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