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Acconeer A121 - 2.3 Choosing a 1.8 V power regulator for A111;A121; 2.4 SPI Interface; 2.5 Hardware schematics design checklist

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Hardware and physical integration guideline A1 PCR sensors
Page 7 of 30
2024-02-07 © 2024 by Acconeer – All rights reserved
optimize the current consumption, the VIO on A121 should be equal to the I/O voltage on the host
MCU that controls it. The A121 power consumption when the ENABLE pin is low is < 1 µA and
there is thus no need for a power switch as is the case for A111.
If the power to the A121 is switched off in between radar sweeps it is important that the control
signals and SPI interface are pulled low during this time, otherwise reverse leakage will occur via the
ESD diodes in the A121.
2.3 Choosing a 1.8 V power regulator for A111/A121
When the A111/A121 radar sensors transfer from the “SLEEP” state to the “MEASURE” state, there
is an abrupt change in current consumption from ~3 mA to ~75 mA on the 1.8 V power domain. It
must be ensured that the power regulator used to supply the A111/A121 has a load transient response
that handles this change in current without the output voltage dropping below the minimum operating
supply voltage of A111/A121. For details regarding the power consumption of A111 and A121, refer
to the datasheet of the respective product [2] [3].
2.4 SPI Interface
To ensure good signal integrity for the SPI bus, it is recommended to keep the SPI traces as short as
possible with an adjacent ground plane. Place a ground via close to the signal via when changing
layers to maintain a constant trace impedance. Impedance matching of the SPI bus is usually not
needed as the trace lengths are electrically short for low drive strength configurations.
2.5 Hardware schematics design checklist
1. Does the selected crystal fulfill the load conditions according to the A111/A121 datasheet [2]
[3]?
2. Have you connected all ground balls on the package?
3. Is the ground plane size based on Figure 5?
4. Are the decoupling capacitors placed according to the guidelines in chapter 3.3.2?
5. Have you chosen your power regulator based on the information in chapter 2.3?
6. Is the power supply and SPI interface routed with an adjacent ground plane?
7. Have you placed nearby ground vias to your signal and power supply vias?