Technical specifications
PCIe
®
specifications
The primary I/O bus for the main board is PCIe Gen2. The following table lists the characteristics of the
PCI-E bus segments. Details about each bus segment follow the table.
NOTE: The signaling bit rate of PCI Express is 2.5Gbit/s one direction per lane for Gen 1 and 5.0Gbit/s one
direction per lane for Gen 2.
Expansion
slot
Number Type Bus width
1
Voltage Connector Location Length
PCIe x16 1 PCIe Gen2 x16 3.3V x16 Onboard Full height
PCIe x8 2 PCIe Gen2 x4 3.3V x8 Onboard Full height
PCIe x4 1 PCIe Gen2 x1 3.3V x4 Onboard Full height
PCI 2 PCI 32 bit 3.3V PCI Onboard Full height
NOTE:
1. Indicates the number of physical electrical lanes running to a PCIe
®
connector.
2. Default bus assignment (in decimal). Inserting cards with PCI™ bridges may alter the actual bus
assignment number.
3. Slots are enumerated differently based on the operating system. Microsoft® operating systems
enumerate Device ID by bus starting from the lowest bus to the highest.
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