ESG Family Signal Generators Front and Rear Panel
Front Panel Overview
User’s Guide 3-7
32. DATA CLOCK Input Connector
The TTL/CMOS compatible DATA CLOCK connector accepts an externally supplied
data-clock input for digital modulation applications. The expected input is a TTL or CMOS
signal (either bit or symbol) where the rising edge is aligned with the beginning data bit.
The CMOS falling edge is used to clock the DATA and SYMBOL SYNC signals.
The maximum clock rate is 50 MHz if the user supplies the data. If the signal generator is
supplying any of the data, the maximum rate is 5 MHz. The damage levels are > +8 and
<
−
4V.
This female BNC connector is provided on instruments with Option UN8. It is also present
but not functional on instruments with Option UND. On instruments with Option 1EM,
this input is relocated to a rear panel SMB connector.
33. SYMBOL SYNC Input Connector
The CMOS compatible SYMBOL SYNC connector accepts the digital-modulation symbol
synchronization signal from an external source. This signal synchronizes the serial
multi-bit symbol transmission. The expected signal may be continuous or a single, one-bit
wide pulse to synchronize the first bit of the first symbol. The CMOS rising edge must be
synchronous with the DATA CLOCK rising edges. The synchronization signal must be
valid on the DATA CLOCK falling edges. The damage levels are > +8 and <
−
4V.
This female BNC connector is provided on instruments with Option UN8. It is also present
but not functional on instruments with Option UND. On instruments with Option 1EM,
this input is relocated to a rear panel SMB connector.
34. PULSE IN Connector
This connector accepts an externally supplied TTL-compatible pulse signal. The pulse
signal is activated with the
Fast Pulse Off On softkey or via SCPI command. The maximum
input for this connector is
±
15 volts. This female BNC connector is provided only on
instruments with Option 1E6.
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