Alinco DR-130 - Page 6

Port No. I/O Logic PinName Description
40 I/O Clock SDA Data Output for EEPROM
41 O Clock CLK Clock Output
42 O Clock DAT DataOutput
43 O Clock ST1 Strobe Output for PLL IC
44 O Clock ST2 Strobe Output for CTCSS IC
45 I Active Low SFT Shift Key Input
46 I Active Hig
h
SD Signal Detection Input
47 O Active Hig
h
H/L Transmission Power (H: Low Power)
48 I Active Low V/M VFO/Memory Key Input
49 I Active Low CAL Call Key Input
50 I Active Low CTC CTCSS Mode Set Input
51 I Active Low REV Reverse Key Input
52 I Active Low FNC Function Key Input
53 I Active Low MHz MHzKeyInput
54 I Active Low PTT PTTKeyInput
55 I LV3 Power Supply Input for LCD
56 I LV2 Power Supply Input for LCD
57 I LV1 Power Supply Input for LCD
58 I COM0 LCD Common 0 Output
59 I COM1 LCD Common 1 Output
60 I COM2 LCD Common 2 Output
61 I No Use
62 O SEG00 LCD Segment 00 Output
63 O SEG01 LCD Segment 01 Output
64 O SEG02 LCD Segment 02 Output
65 O SEG03 LCD Segment 03 Output
66 O SEG04 LCD Segment 04 Output
67 O SEG05 LCD Segment 05 Output
68 O SEG06 LCD Segment 06 Output
69 O SEG07 LCD Segment 07 Output
70 O SEG08 LCD Segment 08 Output
71 O SEG09 LCD Segment 09 Output
72 O SEG10 LCD Segment 10 Output
73 O SEG11 LCD Segment 11 Output
74 O SEG12 LCD Segment 12 Output
75 O SEG13 LCD Segment 13 Output
76 O SEG14 LCD Segment 14 Output
77 O SEG15 LCD Segment 15 Output
78 I ActiveHigh UL UnlockInput
79 I Analog SM SignalMeterInput
80 O SEG18 LCD Segment 18 Output
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