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Apple Lisa - Page 49

Apple Lisa
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Confidential
ORB/IRB
ORA/IRA
DDRB
DORA
TIC-L
TIC-H
TIL-L
TIL-H
T2C-L
T2C-H
SR
ACR
PCR
IFR
IER
ORA/IRA
Lisa
Hardware Reference
6522
REGISTER
ADDRESSES
Output/Input
Register
B
Output/Input
Register
A
Data
Direction
Register
B
Data
Direction
Register
A
Tl Low-order
Latches/Counter
Tl
High-order
Counter·
Tl Low-order
Latches
Tl
High-order
Latches
T2
Low-order
Latches/Counter
T2
High-order
Counter
Shift
Register
Auxiliary
Control
Register
Peripheral
Control
Register
Interrupt
Flag
Register
Interrupt
Enable
Register
Same
as
Register
1
but
without
handshaking
Manual
~C~
1ffD\
$OODlO!,!
$000109 (
$00Dl1l
$000119
$000121
I.
$000129
$000131
$00D139
$000141 /
$00D149
(I
$000151
$00D159
'
$000161
$000169
$00D171
(
$00D179
j
The
register
addresses
for
this
6522
jump
by
4 words
per
register.
This
peculiar
address
decode
allows
a
MOVEP.L
instruction
to
transfer
4
bytes
to
or
from
the
Peripheral
A
Port
during
a
disk
read
or
write.
By
decreasing
the
number of
instructions
needed
to
transfer
the
data,
the
transfer
rate
is
increased.
The
parity
flip-flop
should
be
reset
before
each
transfer
by
clearing,
then
setting
the
PRES/
bit
in
the
keyboard 6522.
Page
49
7-Jul-81

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