ASROCK B460 Pro4 - Page 70

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Clock Slew Rate
Adjust Clock Slew Rate for better signal. Default is 53.
MRS Setting
MRS tCL
Congure the tCL for Memory MRS MR0.
MRS tWRtRTP
Congure the tWRtRTP for Memory MRS MRC.
MRS tCWL
Congure the tCWL for Memory MRS MR2.
MRS tCCD_L
Congure the tCL for Memory MRS MR6.
Advanced Setting
ASRock Timing Optimization
Congure the fast path through the MRC.
Realtime Memory Timing
Congure the realtime memory timings.
[Enabled] e system will allow performing realtime memory timing changes aer
MRC_DONE.
Command Tristate
Congure the Command Tristate Support.
Exit On Failure
Congure the Exit On Failure for MRC training steps.
Reset On Training Fail
Reset system if the MRC training fails.
MRC Fast Boot
Enable Memory Fast Boot to skip DRAM memory training for booting faster.