Asus M4A78LT PLUS - Chipset

2-14 Chapter 2: BIOS information
2.4.2 Chipset
NorthBridge Conguration
DRAM Controller Conguration
Bank Interleaving [Auto]
Allows you to enable the bank memory interleaving. Conguration options: [Disabled]
[Auto]
Channel Interleaving [Auto]
Allows you to enable the channel memory interleaving.
Conguration options: [Disabled] [Address bits 6] [Address bits 12] [Auto]
[XOR of Address bits [20:16, 6]] [XOR of Address bits [20:16, 9]]
Enable Clock to All DIMMs [Disabled]
Enables unused Clocks to DIMMs even though memory slots are not populated.
Conguraiton options: [Enabled] [Disabled]
MemClk Tristate C3/ATLVID [Disabled]
Allows you to enable or disable MemClk Tri-Stating during C3 and Alt VID.
Conguration options: [Disabled] [Enabled]
Memory Hole Remapping [Enabled]
Allows you to enable or disable memory remapping around memory hole.
Conguration options: [Disabled] [Enabled]
DCT Unganged Mode [Always]
Allows you to select the unganged DRAM mode (64-bit width).
Conguration options: [Auto] [Always]
Power Down Enable [Disabled]
Allows you to enable or disable DDR power down mode.
Conguration options: [Disabled] [Enabled]
ECC Conguration
ECC Mode [Disabled]
Enables or disables the DRAM ECC that allows the hardware to report and correct
memory errors automatically. Conguration options: [Disabled] [Basic] [Good] [Super]
[Max] [User]
Primary Video Controller [GFX0-GPP-PCI]
Allows you to set the primary display controller. Conguration options: [GFX0-GPP-PCI]
[GPP-GFX0-PCI] [PCI-GFX0-GPP]
2.4.3 Onboard Devices Conguration
Serial Port1 Address [3F8/IRQ4]
Selects the Serial Port1 base address. Conguration options: [Disabled] [3F8/IRQ4]
[2F8/IRQ3] [3E8/IRQ4] [2E8/IRQ3]
HDAudio Controller [Enabled]
Enables or disables the high denition audio controller. Conguration options: [Disabled]
[Enabled]