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4929B–AUTO–01/07
ATA6264 [Preliminary]
The following settings can be made at the initial programming:
MSBit LSBit
VR1 VR2 VR3 VR4 EXT ISO/LIN Parity Lock bit
Table 5-2. Initial Programming Settings
VR1 VR2 VR3 VR4 VCORE VPERI VSAT
0 0 0 0 All regulators deactivated (default)
0 0 0 1 1.88V 3.3V 7.8V
0 0 1 0 1.88V 3.3V 9.1V
0 0 1 1 1.88V 3.3V 10.4V
0 1 0 0 2.5V 3.3V 7.8V
0 1 0 1 2.5V 3.3V 9.1V
0 1 1 0 2.5V 3.3V 10.4V
0 1 1 1 1.88V 5V 7.8V
1 0 0 0 1.88V 5V 9.1V
1 0 0 1 1.88V 5V 10.4V
1 0 1 0 2.5V 5V 7.8V
1 0 1 1 2.5V 5V 9.1V
1 1 0 0 2.5V 5V 10.4V
1 1 0 1 5V 5V 7.8V
1 1 1 0 5V 5V 9.1V
1 1 1 1 5V 5V 10.4V
Set to 0 Set to 1
EXT No external transistor at VPERI (default) External transistor at VPERI applied
Set to 0 Set to 1
ISO/LIN ISO9141 mode is activated at K1 (default) LIN mode is activated at K1
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