Belcom LS-202E - Pll Section

PLL
SECTION
1)
PLL
OSC Circuit
The PLL HET. l\,4ixer oscillator
is 0509, and
crystal
Y502 at
32.32625
MNz is
doubled
to 64.6525
[,4H2 via L520
and t521
before being
mixed with VCO output
in 0504.
The
+5
KHz
shift
circuit is operated when
0506 is lurned on so as
to shift the
frequency upward by 2.5
KHz. The
+600
KHz repeater shift
is
operated when
D506 is turned
on
to
obtain 64.9525
MHz
from
Y506. 0507
provides
the
+5
KHz shift
for the
+600
KHz repeater
crystal Y504 the
-600
KHz repeater shift is operated
when D507
is turned on to obtain 64.3525
i\4Hz
from Y503. 0508
provides
the
+5
KHz
shift
for the
-600
KHz repeater crystal
Y504.
Phase comparison, Master
OSC, VCO circuit
The master oscillator
frequency oI
1A.24
MHz
is
generated
by
1C502
and
is frequency-divided
by 1/2A48 to
produce
5 kHz
at
pin
6.
This
5
kHz reference signal and
the output
from 1C503
pro-
grammable
divider are
phase-compared
by 1C501
phase-comparison
lC,
and the
VCO control
voltage is obtained
at
pin
3 of
1C501
.
0502 VCO oscillator
generates
1/2 ot
YCO oscillator
frequency
and
;s
tuned
by D501 and 502
vari-cap.
The desired
frequency is
obtained when
it is locked.
The signal
from 1C501
pin
4 blocks transmission
when the
PLL
is
un locKeo.
The VCO
frequency is doubled by 0505
after the
PLL is locked to
the desired frequency.
Mixer,
Programmable
dividel
The signal
from
the
VCO
is fed to 0503 buffer-amplifier
and then
mixed
with
frequency
from
the
VXO oscillator
circuit in 0504.
The output
from 0504
passes
through
a
low
pass
filter to
pro
gramable
divider
1C503. The
programming
data
for 1C503 cornes
frorn the thumbwheel
switches, and the 5
kHzoutput
fed to com-
partor
1C501
.
3)