Casio MG-500 - Page 21

8
RESET
CIRCUIT
--
re
ge
ee
integral
circuit
In
order
to
initialize
CPU's
internal
circuits
at
Power
ON,
a
voltage
detector
IC
PST1518A
generates
RESET
signal.
PST-1518
receives
VDD
(+5
V)
from
pin
1
and
outputs
Low
level
signal
from
pin
3
while
the
input
voltage
is
less
than
+4.2
V
and,
pin
3
pro-
vides
High
level
when
VDD
is
more than
+4.2
V.
When
the
power
switch
is
turned
on,
signal
RESET
rises
to
High
level
gradually
by
the
in-
tegral circuit.
CPU
then
resets
its
internal
circuits
while
is
Low.
PU
reset
When
the
power
switch
is
turned
off,
the
capacitor
immediately
discharges
itself
through
pin
2
of
PST1518A
so
that
signal
RESET
is
provided
even
the
power
switch
is
turned
on,
off,
and
on
quickly.
CPU
is
also
reset
when
the
battery
is
weak
and
VDD
becomes
less
than +4.2
V.
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