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CHAINTECH CT-6BSA - Page 23

CHAINTECH CT-6BSA
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Hardware Setup
19
SPD (Serial Presence Detect)
This is an EPROM that contains speed and design information about the memory
module. The mainboard queries the module and makes adjustments to system
operation based on what it finds.
ECC DRAM Capability
This mainboard can be configured to support ECC (Error Check and Correct)
function when utilizing parity DIMM modules. To utilize the chipset's ECC features,
you must use a 72-bit DIMM module.These modules are automatically detected during
bootup. However, the user must configure the DRAM Data Integrity Mode to "ECC"
in BIOS's SeePU&Chipset Features Setup menu to enable the ECC function. ECC
detects double bit errors and detects and corrects single bit memory errors on the
fly without user intervention. Errors may be generated by a defective memory module,
conflicting memory speeds between different banks, DMA, etc.

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