Clevo N240WU - Page 60

Schematic Diagrams
B - 12 Processor 10/11
B.Schematic Diagrams
Processor 10/11
Sheet 11 of 41
Processor 10/11
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
(For 2+3E (15W) ᶲẞ )
31 A
31 A
㓦伖
cpu
側朊
㓦伖
cpu TOP
␐⚵
暣㸸廠ℍ嗽
D02 6/8 ADD
ANDY 0405 DEL
U2+2 & U4+2 COLAY
U2+2
ᶲ R585,R586
U4+2 ᶲ R584,R592
2/23
㓦 伖 側 朊
back 1u 7pcs
back 10u 5pcs
back 22u 6pcs
back 47u 4pcs
back 10u 6pcs
6A
6A
D02 6/8
㓡ᶲẞ
D02 6/8 ADD
D02 6/9 ADD
VCORE_GTX
VCCGTX
VCCGT_K52
VCORE_GT
VCCGT
VCCGT
VCCGT
VCCGT
VCCIN
VCCIN
VCCGT
VCCGT
VCCGT[32]
VCCIN[9,32]
VCCGT_SENSE_R[33]
VSSGT_SENSE_R[33]
Title
Size Document Number Rev
Date: Sheet
of
6-71-N24W0-D02
1.0
[11] KBL 10/11 POWER3
A4
11 43Wednesday, June 21, 2017
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
N240WU
Title
Size Document Number Rev
Date: Sheet
of
6-71-N24W0-D02
1.0
[11] KBL 10/11 POWER3
A4
11 43Wednesday, June 21, 2017
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
N240WU
Title
Size Document Number Rev
Date: Sheet
of
6-71-N24W0-D02
1.0
[11] KBL 10/11 POWER3
A4
11 43Wednesday, June 21, 2017
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
N240WU
C7
1u_6.3V_X5R_04
C57
22u_6.3V_X5R_06
C138 *10u_6.3V_X5R_06
U2+2
C33
10u_6.3V_X5R_06
C111
1u_6.3V_X5R_04
C47
10u_6.3V_X5R_06
R584 2m_1%_08
U4+2
C374
47u_6.3V_X5R_08
C8
1u_6.3V_X5R_04
C51
22u_6.3V_X5R_06
C109
1u_6.3V_X5R_04
C76
10u_6.3V_X5R_06
C357
47u_6.3V_X5R_08
C35
1u_6.3V_X5R_04
C64
10u_6.3V_X5R_06
C108
1u_6.3V_X5R_04
C118
22u_6.3V_X5R_06
C63
10u_6.3V_X5R_06
C9
1u_6.3V_X5R_04
C119
22u_6.3V_X5R_06
C359
47u_6.3V_X5R_08
C112 *1u_6.3V_X5R_04
U2+2
C107
1u_6.3V_X5R_04
C40
1u_6.3V_X5R_04
C58
10u_6.3V_X5R_06
R21*0_04
C354
47u_6.3V_X5R_08
C14
10u_6.3V_X5R_06
U4+2
C113
1u_6.3V_X5R_04
U4+2
R28
100_04
C66
22u_6.3V_X5R_06
C37
1u_6.3V_X5R_04
C88
*10u_6.3V_X5R_06
R22*0_04
C105
22u_6.3V_X5R_06
R29
100_04
C38
1u_6.3V_X5R_04
C78
*10u_6.3V_X5R_06
R592 2m_1%_08
U4+2
C39
1u_6.3V_X5R_04
C77
*10u_6.3V_X5R_06
+
C381
*330uF_2.5V_12m_6.6*6.6*4.2
R23
0_04
C134
22u_6.3V_X5R_06
U4+2
C67
10u_6.3V_X5R_06
C93
1u_6.3V_X5R_04
R586*0_04 U2+2
C3
1u_6.3V_X5R_04
C136
10u_6.3V_X5R_06
U4+2
CPU POWER 2 OF 4
U19M
KBL_R_U42_1P0_IP/BGA
VCCGT_SENSE
J70
VSSGT_SENSE
J69
VCCGT_60
W63
VCCCORE_44
J43
VCCCORE_22
AL46
VCCGT_8
AA69
VCCGT_61
W64
VCCGT_50
R66
VCCCORE_45
J45
VCCCORE_23
AL50
VCCCORE_12
AK42
VCCGT_9
AA70
VCCGT_62
W65
VCCGT_51
R67
VCCGT_40
N63
VCCCORE_57
K48
VCCCORE_46
J46
VCCCORE_13
AK43
VCCGT_63
W66
VCCGT_52
R68
VCCGT_41
N64
VCCGT_30
L63
VCCCORE_58
K50
VCCCORE_47
J48
VCCCORE_14
AK45
VCCGT_64
W67
VCCGT_53
R69
VCCGT_42
N66
VCCGT_31
L64
VCCGT_20
J55
VCCCORE_48
J50
VCCGTX_1
AK53
VCCCORE_15
AK46
VCCGT_65
W68
VCCGT_54
R70
VCCGT_43
N67
VCCGT_32
L65
VCCGT_21
J56
VCCCORE_49
J52
VCCGTX_2
AK55
VCCCORE_16
AK48
VCCGT_10
AA71
VCCGT_66
W69
VCCGT_55
R71
VCCGT_44
N69
VCCGT_33
L66
VCCGT_22
J58
VCCGTX_10
AM53
VCCGTX_3
AK56
VCCCORE_17
AK50
VCCGT_11
AC64
VCCGT_67
W70
VCCGT_56
T62
VCCGT_45
N70
VCCGT_34
L67
VCCGT_23
J60
VCCGTX_11
AM56
VCCCORE_29
AM48
VCCGTX_SENSE
AK62
VCCGTX_4
AK58
VCCGT_12
AC65
VCCGT_68
W71
VCCGT_57
U65
VCCGT_46
N71
VCCGT_35
L68
VCCGT_24
K53
VCCGTX_12
AM58
VCCGTX_5
AK60
VCCGT_13
AC66
VCCGT_69
Y62
VCCGT_58
U68
VCCGT_47
R63
VCCGT_36
L69
VCCGT_25
K55
VCCGTX_13
AU58
VCCGTX_6
AK70
RSVD_5
AK52
VCCGT_14
AC67
VCCGT_59
U71
VCCGT_48
R64
VCCGT_37
L70
VCCGT_26
K56
RSVD_6
K52
VCCGTX_14
AU63
VCCGTX_7
AL53
VCCGT_15
AC68
VCCGT_1
A58
VCCGT_49
R65
VCCGT_38
L71
VCCGT_27
K58
VCCGTX_15
BB57
VCCGTX_8
AL56
VCCGT_16
AC69
VCCGT_2
A62
VCCGT_39
M62
VCCGT_28
K60
VCCGTX_16
BB66
VCCGTX_9
AL60
VCCGT_17
AC70
VCCGT_3
A66
VCCCORE_5
A48
VCCGT_29
L62
VCCGT_18
AC71
VCCGT_4
AA63
VCCCORE_6
A53
VCCGT_19
J53
VCCCORE_30
AM50
VCCGT_5
AA64
VCCCORE_31
AM52
VSSGTX_SENSE
AL61
VCCGT_6
AA66
VCCCORE_21
AL43
VCCGT_7
AA67
R30
0_04
C104
*10u_6.3V_X5R_06
C137
10u_6.3V_X5R_06
U4+2
C94
1u_6.3V_X5R_04
C110
1u_6.3V_X5R_04
R585 2m_1%_08
U2+2