External Ready
(XRDY)
This input provides a way for an external device to delay the mother-
board generated IDTACK, for things like slow memory and I10
boards that need to add wait states. This signal should be negated
very quickly, no later than 60ns from address valid (/AS asserted), in
order for the motherboard circuitry to have enough time to prevent
the normal assertion of
IDTACK. XDRY should stay negated for as
many wait states as required. Once XRDY
is
asserted, IDTACK com-
pletes the rest of the normal cycle.
XRDY
is a wired-OR input;
it
is
pulled up by a resistor on the motherboard, and should be driven
with an open collector or equivalent output. Pin 18.
Configuration Chain
Pins 1 1 and 12 are basically the configuration
IN
and configuration
(ICOPCFG)
OUT signals. Pin 12, the configuration
IN
input, is grounded on all
versions of the Local Bus Ports, indicating that this Slot is the first in
any configuration chain and may proceed with configuration. On the
A500,
A1 000, and A2000, the configuration OUT signal, pin 12, is a
no-connect. Because of this,
its
impossible to normally autoconfigure
any device in the Coprocessor slot of an
A2000. On the B2000, pin
1
1
is
a true configuration OUT signal, which becomes the configura-
tion
IN
input to the first Expansion Slot. This, the coprocessor slot is
configured first on the
B2000.
A
note of caution here, though.
All
normal Expansion Bus devices assert their /SLAVE output whenever
they respond to an address. This /SLAVE output allows the collision
detect circuitry to determine if multiple devices are responding to
the same address. When a collision
is
detected this way, the /BERR
signal is asserted, causing all PlCs to tri-state, and saving both these
PlCs and the Expansion Bus drivers from any potentially destructive
buffer fights. While the Coprocessor slot on the B2000 can be auto-
matically configured,
it
can't assert a SLAVE signal for collision de-
tect. Thus, designers must be very careful with any autoconfiguring
resources on a Coprocessor card.
During the autoconfiguration process, first the Coprocessor card,
then all an unconfigured PlCs in turn, respond to the
64K
address
space starting at SE80000 as their respective CFGIN signals are as-
serted.
All
unconfigured PlCs come up with CFGOUT negated. When
configured, or told to "shut up", the Coprocessor Card or any PIC
should assert CFGOUT, which results in the CFGlN of the next slot to
be asserted. On-board logic automatically passes on the state of the
previous CFGOUT to the next CFGlN for any slot not occupied by a
Plc, so there's no need to sequentially populate the Expansion Bus
Slots and no need to have the Coprocessor Card do any
autoconfi-
guring if real autoconfiguration isn't necessary.
DMA
AND
This will be covered in more detail in the next section, but this sec-
COPROCESSOR
SIGNALS
tion covers the basic signals involved in DMAs and the Coprocessor
interface.
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