Section
5
Amiga
Hard
DisWSCSl
Controller
DESCRIFT"I'ON
The Amiga Hard DisWSCSl Controller is an intelligent high perfor-
mance controller designed to interface both ST506 hard disk drives
and
SCSl devices to the Amiga expansion bus architecture. A back-
ground command processor provides high level command interpre-
tation minimizing Host intervention. Data is transferred to and from
the Host via DMA (direct memory access) with
FlFO allowing high
data throughput while maintaining reasonable bus bandwidth for
other bus controllers.
FEATURES
Support for up to two ST506 hard disk drives
Full SCSl with Maclntosh Plus compatibility
High level command interpretation and exceptional handling per-
formed by
280
processor
Support for up to
8
heads, 2048 cylinder with 51 2 byteslsector
Individually Programmable Drive Characteristics
1
:l sector interleave
32 bit ECC for data correction
Multiple block transfers
Full auto-config compatibility
Real time data transfer rates of up to 800nslbyte via DMA
SPECIFICATIONS
Performance
Hard Disk (ST506)
Encoding method:
Cylinder per head:
Sectors per track:
Sector length:
Heads:
Drive Selects:
Step Rate:
Data Transfer Rate:
Write Precomp Time:
Sector Interleave:
Sector Interleave Across Heads:
Ecc Polynomial:
Burst Error Correction:
MFM
Up to 2048
Up to
17
51 2
8
2
3.2 us to 6.5 ms
5.0
MbitJsec.
12 nanosec.
1
:l
1 :2
32 bits
1
l
bits