BIT#
15
14
13
12
11
10
09
08
07
06
05
04
03
02
0
1
00
HIRES
BPU
HOMOD
DBLPF
COLOR
GAUD
LPEN
LACE
ERSY
BPLCONO
HIRES
BPU2
BPU 1
BPUO
HOMOD
DBLPF
COLOR
GAUD
X
X
X
X
LPEN
LAC
E
ERSY
X
=
High resolution
(640)
mode
=
Bit
plane use code 000-1 10 (NONE
through
6
inclusive)
=
Hold and Modify mode
=
Double playfield (PF1
=
odd,
PF2
=
even bit planes)
=
Composite video COLOR enable
=
Genlock audio enable (mixed on
BKGND pin during
vertical blanking)
=
Light pen enable (reset on power up)
=
Interlace enable (reset on power up)
=
External Resync (HSYNC. VSYNC
pads become inputs;
reset on power up)
COPCON
Copper control register
This is
a
l -bit register that when set true, allows the Copper to ac-
cess the Blitter hardware. This bit is cleared by power on reset, so
that the Copper cannot access the Blitter hardware.
BIT# NAME FUNCTION
0
1 CDANG Copper danger mode. Allows Copper
access to Blitter if true.
COPJMPl
Copper restart at first location
COPJMP2
Copper restart at second location
These addresses are strobe addresses; when written to, they cause
the Copper to jump indirect using the address contained in the First
or Second Location registers described below. The Copper itself can
write to these addresses, causing
its
own jump indirect.
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