ISLVOUT RD IASQ IASQSO COLLIS /BG /AS IBGACK IDMAIN GND
/OWN IAOE NDS IBERR IDMAOUT /LDS /DBOE /RES /D2P VCC
DBOE
=
AS */RD
*
IBERR
+
;DATA DRIVERS DURING WRITE CYCLE
UDS
*
RD
*
ASQ
*
IBERR
+
;TURN ON DRIVERS LATE FOR RD
LDS
*
RD
*
ASQ
*
IBERR
;UDS AND LDS PROTECT RD MOD WR
;TO AVOID
TRILTATE FIGHT
D2P
=
IDMAOUT
*
SLVOUT
*
RD
+
;DOWNSTREAM READS UPSTREAM SLAVE
DMAOUT
*
ISLVOUT
*
IRD
+
;UPSTREAM WRITES DOWNSTREAM SLAVE
DMAOUT
*
SLVOUT
;MASTER AND
SMVE ARE UPSTREAM
AOE
=
BGACK
t
/BG
*
IDMAOUT
+
AS
+
BQSO
DMAOUT
=
DMAlN
+
OWN
IF
(IRES
*
COLLIS) BERR
=
VCC
DESCRIPTION
;AS KEEPS ADDR WHEN IBG DROPS
;&Q90 MAINTAINS VALID ADDR ON
;
LAST PROC CYCLE
SLVOUT
=
SLAVEOUT,ASQ
=
AS DELAYED,ASQgO
=
AS CLKD ON LOW EDGE OF 7M,
BG
=
BUS GRANT,OWN
=
LOCAL OWN
COLLIS
=
BUS COLLISION.AOE
=
ADDR OUTPUT EN.DOE
=
DATA OE
RES
=
RESET,D2P
=
DATA TO PROCESSOR
UDS LDS PROTECT AGAINST
RDMODlMWRlTE 3STFIGHT
&
BERR
=
/DOE
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