/C1 Clock
/C3 Clock
CDAC Clock
E
Clock
7MHz
Clock
28MHz
Clock
There are various system clocks available at all Local Bus Ports, use-
ful in designing synchronous Coprocessor systems. Loading on these
clocks should be watched very carefully on all types of Amiga com-
puters.
This is a
3.58
MHz clock synched to the falling edge of the 7.16 MHz
system clock. Also known as /CCK in some places. Pin 16.
This is a 3.58
MHz clock synched to the rising edge of the 7.1
6
MHz
system clock. Also known as /CCKQ in some places. Pin 14.
This is a 7.1
6
MHz clock that leads the 7.1
6
MHz system clock by
about 70ns
(90
degrees). Pin 15.
This
is
the
68000
generated
"E"
clock, used for
6800
family peri-
pherals driven by "E" and 6502 peripherals driven by
PH12. This
clock is six 7.16
MHz clocks high. four clocks low. as per the
68000
spec. This clock is always generated by the
68000,
regardless of the
state of the bus and the Coprocessor; this fact should be considered
by the Coprocessor implementor when designing any Coprocessor
NMA logic. Pin
50.
This
is
the 7.1
6
MHz system clock. This
is
available only on the
B2000 at this pin, and
is
in common with the
68000's
clock input.
This pin, pin
7,
is unused on all other Local Bus Port instances. Many
applications that run on systems without the
7MHz clock create a
7MHz equivalent clock, using the relationship 7MHzEQU
=
/Cl
XNOR /C3; care must be taken in considering any additional delays
that this equivalent clock causes on systems other that the
B2000.
This
is
the 28.64 MHz fundamental clock used to derive all other
system clocks under normal operation. There's no guaranteed phase
relationship between this clock and the system clocks. When the sys-
tem is being driven by an external clock source via XCLK and
IXCLKEN, this clock will essentially be completely asynchronous to
the system clocks.
It
is
provided mainly to provide a fast clock for
fast coprocessors. This is pin
9
on the Coprocessor Slot, and is an un-
used pin on the Expansion Edge of the
A500
and A1 000.
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