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Commodore Plus 4 - Page 265

Commodore Plus 4
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The
6503
Microprocessor
253
Operation:
Branch
onV-1
Flags
Affected:
None
Addressing
Mode
Syntax
Opcode
Bytes
Cycles
Relative
BVS
$hhhh
70
2
2*
*
Add
1
cycle
when
the
branch
is
taken.
Add
2
cycles
when
it
is
taken
across
a
page
boundary.
Example:
This
example
uses
the
BIT
instruction
to transfer
the
status
of
bit
6 of
the
low
byte
of
the
jiffy
clock
to
the
overflow
flag.
First,
the
program
waits
until
this
bit
is
clear,
then
until
it
is
set.
An
increment
of
the
border
color
signals
the
end
of
the
wait.
.
2000
24
A5
BIT
$A5
Transfer
bit
6 of
jiffy
clock
to
over
flow
flag.
.
2002
70
PC
BVS
$2000
Continue
waiting
if
the
bit
is
set.
.
2004
EE
19
PF
LKTC
$FF19
Increment
the
border
color.
.
2007
24
A5
BIT
$A5
Transfer
bit
6 of
jiffy
clock
to
over
flow
flag.
.
2009
50
PC
BVC
$2007
Continue
waiting
if
the
bit
is
clear.
.
200B
EE
19
PP
IUC
$PP19
Increment
the
border
color.
.
200E
00
BRK
Stop
processing.
CLC—Clear
the
Carry
Flag
The
carry
flag
is
cleared
to
0.
Operation:
0
C
Flags
Affected:
C
Addressing
Mode
Syntax
Opcode
Bytes
Cycles
Implied
CLC
18
1
2
Example:
This
program
adds
the
contents
of
$2100
to
the
contents
of
$2101
and
stores
the
result in
$2102.
Because
the
ADC
instruction
adds
the
value
of
the
carry
to
the
sum
of
the
accumulator
and
the
operand,
the
CLC
instruction
is
used
to
clear
the
carry
flag
before
the
addition.
This
ensures
that
the
result
is
exactly
the
first
value
plus
the
second
value.
.
2000
18
CLC
Clear
the
carry
flag
to
prepare
to
add.
.
2001
AD
00
21
LDA
$2100
Get
the
first
value.
.
2004
6D
01
21
ADC
$2101
Add
the
second
value.
.
2007
8D
02
21
STA
$2102
Store
the
result.
.
200A
00
BRK
Stop
processing.
Use
the
M
(Memory)
command
to
examine
and
change
the
contents
of
$2100-$2102.

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