DATA PRECISION 5740 - Input Signal Conditioning Circuit

72-1002
Model 5740 COUNTER
When operated to the HOLD position, the
control signals:
* Remove the input to the counter
3.5 INPUT SIGNAL CONDITIONING
As shown in the simplified block and
circuit schematic of Figure 3-5, the sig
nal connected at the Input J1 is trans
formed into a TTL-compatible pulse train
via a selectable attenuator, transistor
follower, threshold level control, two
stages of amplification, a Schmitt trigger
amplifier stage, and a level conversion
stage for TTL compatibility. The condi
tioning circuitry also includes a clamping
circuit to keep the amplifier input to +2V
peak.
The input is capacitive coupled to the
resistive voltage divider (tuned by capa
citors C2, C3 and CU), from which the at
tenuator slide switch S2 connects either
about 95% (957/1025) or 47% (47/1025) of
the input to high input impedance transis
tor follower Ql. The input to the tran
sistor stage is clamped by CR1-CR4 to a
level of +2V. Note that the input imped
ance remains at about 1 Megohm (1025K)
until the clamping action becomes opera
tive, and that R1 keeps the impedance at
not less than 68K ohms even when the sig
nal is clamped by CR1-CR4.
The AC signal is capacitive-coupled to
two stages of wide band amplification,
followed by a third stage connected as a
Schmitt trigger circuit. All three stages
are part of the monolithic chip Zll. In
order to obtain reliable performance of
the trigger circuit where input signals
have a very low duty cycle, the average
value of the input may be adjusted by the
front panel threshold control, R36. Be
cause input pulse trains of very low duty
cycles will have near-zero average values,
the swing through zero in one direction
will be of very limited amplitude (see
sketch in Figure 3-5) and may not be ade
quate for the operation of the Schmitt
trigger. The threshold level adjust cir
cuit provides the capability to move the
average level as required in order to
obtain a reliable zero-crossing detec
tion by the Schmitt trigger circuit.
The Schmitt trigger circuit incorpora
tes a hysteresis characteristic in the
trigger level circuit for more accurate
waveform measurement in the presence of
noise. Transistor 02, along with gate
TOCOUNTER GATE
TTL COMPAII ^1
—
TO DIVIDER GA1 E
Cl/o
TRiGGtR ITHRfSMOLOl L£
ra"/..
ATTENUATOR
CAPACITANCE VALUES AFTER M»IN6
INTEGERS pF («,. 270pF)
DECIMALS uF MOuF)
AMPLIFIER I
I DIFFERENTIAL INPUT ' EMITTER FOLLOWER j
SCHMITT TRIGGER | TTL-COMPATIBLE CONVERTER
UNAOJUtTfD DC AVERAOE -
Fig. 3-5. Modal 5740 Input Signal Conditioning . Schematic
COPYRIGHT 1976 DATA PRECISION CORPORATION. PRINTED IN THE UJt JL.
3-5