DEC VT220 - Page 110

6.2.6
Video Converter
The video converter transforms parallel character dot matrix data
input from the character generator into serial data output to the
video output circuit. The video converter (Figure 6-22) consists
of the following circuits.
• Conversion control
• Parallel-to-serial (pIS) converter
6.2.6.1 Conversion Control The conversion control circuit
controls loading of parallel character dot matrix data into the
piS converter. The conversion control circuit (Figure 6-23)
consists of the following components.
• INH latch is latched at T5 L time, with output
alternately enabling and disabling the INH gate.
• Cursor skew FIF is set by CURS H during horizontal
retrace time, when double width row is to be processed,
with high output partially enabling INH gate and set
input to INH F/F.
•
INH gate
rows to
character
processed
is
jamset
until
twice.
used during processing of double width
the load FIF, preventing load of a new
each bit of the current character is
• INH F/F -- is used during processing of double width rows
to inhibit shift activity at the PIS converter so that
each bit of data input from the character generator
requires two dot clocks to process instead of one.
• Load F/F -- defines a shift condition (CHR LD L high) or
load condition (CHR LD L low) to the piS converter.
Later in this chapter, Table 6-2 describes the signals shown in
Figure 6-23.
6-26