Denon AVR-S740H Service Manual

Pin No. Mnemonic Type Description
13 RXC_2− HDMI input Digital Input Channel 2 Complement of Port C in the HDMI Interface.
14 RXC_2+ HDMI input Digital Input Channel 2 True of Port C in the HDMI Interface.
15 HP_CTRLD Digital output Hot Plug Detect for Port D.
16 5V_DETD Digital input 5 V Detect Pin for Port D in the HDMI Interface.
17 DGND Ground DVDD Ground.
18 DVDD Power Digital Supply Voltage (1.8 V).
19 DDCD_SDA Digital I/O HDCP Slave Serial Data Port D. DDCD_SDA is a 3.3 V input/output that is 5 V tolerant.
20 DDCD_SCL Digital input HDCP Slave Serial Clock Port D. DDCD_SCL is a 3.3 V input that is 5 V tolerant.
21 CVDD Power Receiver Comparator Supply Voltage (1.8 V).
22 CGND Ground TVDD and CVDD Ground.
23 RXD_C− HDMI input Digital Input Clock Complement of Port D in the HDMI Interface.
24 RXD_C+ HDMI input Digital Input Clock True of Port D in the HDMI Interface.
25 TVDD Power Receiver Terminator Supply Voltage (3.3 V).
26 RXD_0− HDMI input Digital Input Channel 0 Complement of Port D in the HDMI Interface.
27 RXD_0+ HDMI input Digital Input Channel 0 True of Port D in the HDMI Interface.
28 CGND Ground TVDD and CVDD Ground.
29 RXD_1− HDMI input Digital Input Channel 1 Complement of Port D in the HDMI Interface.
30 RXD_1+ HDMI input Digital Input Channel 1 True of Port D in the HDMI Interface.
31 TVDD Power Receiver Terminator Supply Voltage (3.3 V).
32 RXD_2− HDMI input Digital Input Channel 2 Complement of Port D in the HDMI Interface.
33 RXD_2+ HDMI input Digital Input Channel 2 True of Port D in the HDMI Interface.
34 CVDD Power Receiver Comparator Supply Voltage (1.8 V).
35 CGND Ground TVDD and CVDD Ground.
36 TXPVDD Power
1.8 V Power Supply for Digital and I/O Power Supply. This pin supplies power to the
digital logic and I/Os. It should be ltered and as quiet as possible.
37 TXPLVDD Power 1.8 V Power Supply.
38 TXGND Ground TXPVDD Ground.
39 TXPGND Ground TXPLVDD Ground.
40 EXT_SWING Analog input
This pin sets the internal reference currents. Place an 887 Ω resistor (1% tolerance) between
this pin and ground.
41 HPD_ARC− Analog input
Hot Plug Detect Signal. This pin indicates to the interface whether the receiver is connected.
It supports 1.8 V to 5 V CMOS logic levels.
42 ARC+ Analog input Audio Return Channel Input (5 V Tolerant).
43 TXDDC_SDA Digital I/O
Serial Port Data I/O to Receiver. This pin serves as the master to the DDC bus. It supports a
5 V CMOS logic level.
44 TXDDC_SCL Digital output
Serial Port Data Clock to Receiver. This pin serves as the master clock for the DDC bus.
It supports a 5 V CMOS logic level.
45 TXAVDD Power 1.8 V Power Supply for TMDS Outputs.
46 TXGND Ground TXAVDD Ground.
47 TXC− HDMI output
Dierential Clock Output. Dierential clock output at the TMDS clock rate; supports
TMDS logic level.
48 TXC+ HDMI output
Dierential Clock Output. Dierential clock output at the TMDS clock rate; supports
TMDS logic level.
49 TXGND Ground TXAVDD Ground.
50 TX0− HDMI output
Dierential Output Channel 0 Complement. Dierential output of the red data at 10×
the pixel clock rate; supports TMDS logic level.
51 TX0+ HDMI output
Dierential Output Channel 0 True. Dierential output of the red data at 10× the pixel clock
rate; supports TMDS logic level.
52 TXGND Ground TXAVDD Ground.
53 TX1− HDMI output
Dierential Output Channel 1 Complement. Dierential output of the red data at 10×
the pixel clock rate; supports TMDS logic level.
54 TX1+ HDMI output
Dierential Output Channel 1 True. Dierential output of the red data at 10× the pixel
clock rate; supports TMDS logic level.
55 TXAVDD Power 1.8 V Power Supply for TMDS Outputs.
Pin No. Mnemonic Type Description
13 RXC_2− HDMI input Digital Input Channel 2 Complement of Port C in the HDMI Interface.
14 RXC_2+ HDMI input Digital Input Channel 2 True of Port C in the HDMI Interface.
15 HP_CTRLD Digital output Hot Plug Detect for Port D.
16 5V_DETD Digital input 5 V Detect Pin for Port D in the HDMI Interface.
17 DGND Ground DVDD Ground.
18 DVDD Power Digital Supply Voltage (1.8 V).
19 DDCD_SDA Digital I/O HDCP Slave Serial Data Port D. DDCD_SDA is a 3.3 V input/output that is 5 V tolerant.
20 DDCD_SCL Digital input HDCP Slave Serial Clock Port D. DDCD_SCL is a 3.3 V input that is 5 V tolerant.
21 CVDD Power Receiver Comparator Supply Voltage (1.8 V).
22 CGND Ground TVDD and CVDD Ground.
23 RXD_C− HDMI input Digital Input Clock Complement of Port D in the HDMI Interface.
24 RXD_C+ HDMI input Digital Input Clock True of Port D in the HDMI Interface.
25 TVDD Power Receiver Terminator Supply Voltage (3.3 V).
26 RXD_0− HDMI input Digital Input Channel 0 Complement of Port D in the HDMI Interface.
27 RXD_0+ HDMI input Digital Input Channel 0 True of Port D in the HDMI Interface.
28 CGND Ground TVDD and CVDD Ground.
29 RXD_1− HDMI input Digital Input Channel 1 Complement of Port D in the HDMI Interface.
30 RXD_1+ HDMI input Digital Input Channel 1 True of Port D in the HDMI Interface.
31 TVDD Power Receiver Terminator Supply Voltage (3.3 V).
32 RXD_2− HDMI input Digital Input Channel 2 Complement of Port D in the HDMI Interface.
33 RXD_2+ HDMI input Digital Input Channel 2 True of Port D in the HDMI Interface.
34 CVDD Power Receiver Comparator Supply Voltage (1.8 V).
35 CGND Ground TVDD and CVDD Ground.
36 TXPVDD Power
1.8 V Power Supply for Digital and I/O Power Supply. This pin supplies power to the
digital logic and I/Os. It should be ltered and as quiet as possible.
37 TXPLVDD Power 1.8 V Power Supply.
38 TXGND Ground TXPVDD Ground.
39 TXPGND Ground TXPLVDD Ground.
40 EXT_SWING Analog input
This pin sets the internal reference currents. Place an 887 Ω resistor (1% tolerance) between
this pin and ground.
41 HPD_ARC− Analog input
Hot Plug Detect Signal. This pin indicates to the interface whether the receiver is connected.
It supports 1.8 V to 5 V CMOS logic levels.
42 ARC+ Analog input Audio Return Channel Input (5 V Tolerant).
43 TXDDC_SDA Digital I/O
Serial Port Data I/O to Receiver. This pin serves as the master to the DDC bus. It supports a
5 V CMOS logic level.
44 TXDDC_SCL Digital output
Serial Port Data Clock to Receiver. This pin serves as the master clock for the DDC bus.
It supports a 5 V CMOS logic level.
45 TXAVDD Power 1.8 V Power Supply for TMDS Outputs.
46 TXGND Ground TXAVDD Ground.
47 TXC− HDMI output
Dierential Clock Output. Dierential clock output at the TMDS clock rate; supports
TMDS logic level.
48 TXC+ HDMI output
Dierential Clock Output. Dierential clock output at the TMDS clock rate; supports
TMDS logic level.
49 TXGND Ground TXAVDD Ground.
50 TX0− HDMI output
Dierential Output Channel 0 Complement. Dierential output of the red data at 10×
the pixel clock rate; supports TMDS logic level.
51 TX0+ HDMI output
Dierential Output Channel 0 True. Dierential output of the red data at 10× the pixel clock
rate; supports TMDS logic level.
52 TXGND Ground TXAVDD Ground.
53 TX1− HDMI output
Dierential Output Channel 1 Complement. Dierential output of the red data at 10×
the pixel clock rate; supports TMDS logic level.
54 TX1+ HDMI output
Dierential Output Channel 1 True. Dierential output of the red data at 10× the pixel
clock rate; supports TMDS logic level.
55 TXAVDD Power 1.8 V Power Supply for TMDS Outputs.
Before Servicing
This Unit
Electrical Mechanical Repair Information Updating
45

Denon AVR-S740H Specifications

General

Channels	7.2
Power Output per Channel	75 W (8 Ohms, 20 Hz - 20 kHz, 0.08% THD)
HDMI Inputs	6
HDMI Outputs	1
Dolby Atmos	Yes
DTS:X	Yes
Bluetooth	Yes
Wi-Fi	Yes
HEOS Multi-room	Yes
4K Ultra HD Pass-through	Yes
Power Output per Channel (6 Ohms)	110 W (6 Ohms, 1 kHz, 0.7% THD)
4K/Ultra HD Upscaling	Yes
Phono Input	Yes
Dolby Support	Dolby Atmos, Dolby TrueHD, Dolby Surround
Auto Calibration	Audyssey MultEQ
Input Sensitivity/Impedance	200 mV / 47 kOhms
Signal-to-Noise Ratio	98 dB (IHF-A weighted, Direct mode)
Ethernet	Yes
USB Port	Yes (front)
AM/FM Tuner	Yes
Supported Audio Formats	MP3, WMA, AAC, FLAC, ALAC, WAV, DSD
HDR Support	HDR10, HLG, Dolby Vision
Wireless Audio	AirPlay 2
DTS Support	DTS:X, DTS-HD Master Audio
Zone Audio	Zone 2
Frequency Response	10 Hz - 100 kHz (+1, -3 dB, Direct Mode)
Total Harmonic Distortion	0.08% (20 Hz - 20 kHz)
Built-in DAC	192 kHz / 24-bit