Denon AVR-S740H Service Manual

PCM5100APWR (DIGITAL_NETWORK : IC765)
Block diagram
Pin Functions
PIN
TYPE DESCRIPTION
NAME NO.
AGND 9 — Analog ground
AVDD 8 P Analog power supply, 3.3 V
BCK 13 I Audio data bit clock input
(1)
CAPM 4 O Charge pump flying capacitor terminal for negative rail
CAPP 2 O Charge pump flying capacitor terminal for positive rail
CPGND 3 — Charge pump ground
CPVDD 1 P Charge pump power supply, 3.3 V
DEMP 10 I De-emphasis control for 44.1-kHz sampling rate
(1)
: Off (Low) / On (High)
DGND 19 — Digital ground
DIN 14 I Audio data input
(1)
DVDD 20 P Digital power supply, 1.8 V or 3.3 V
FLT 11 I Filter select : Normal latency (Low) / Low latency (High)
FMT 16 I Audio format selection : I
2
S (Low) / Left-justified (High)
LDOO 18 P Internal logic supply rail terminal for decoupling, or external 1.8 V supply terminal
LRCK 15 I Audio data word clock input
(1)
OUTL 6 O Analog output from DAC left channel
OUTR 7 O Analog output from DAC right channel
SCK 12 I System clock input
(1)
VNEG 5 O Negative charge pump rail terminal for decoupling, –3.3 V
XSMT 17 I Soft mute control
(1)
: Soft mute (Low) / soft un-mute (High)
(1) Failsafe LVCMOS Schmitt trigger input
Audio Interface
8x Interpolation Filter
32bit Modulator
Current
Segment
DAC
Current
Segment
DAC
I/V I/V
Analog
Mute
Analog
Mute
Zero
Data
Detector
UVP/Reset
PLL Clock
Power
Supply
Ch. PumpPOR
Clock Halt
Detection
Advanced Mute Control
SCK
BCK
LRCK
CAPP
CAPM VNEG
LINE OUT
DIN (i2s)
PCM510xA
CPVDD (3.3V)
AVDD (3.3V)
DVDD (1.8V or 3.3V)
GND
AD8195 (F-HDMI : IC811)
AD8195 Terminal Functions
NOTES
1. THE AD8195 LFCSP HAS AN EXPOSED PAD ON THE UNDERSIDE OF
THE PACKAGE THAT AIDS IN HEAT DISSIPATION. THE PAD MUST BE
ELECTRICALLY CONNECTED TO THE AVEE SUPPLY PLANE IN ORDER
TO MEET THERMAL SPECIFICATIONS.
AD8195
TOP VIEW
(Not to Scale)
1IN0
2IP0
3IN1
4IP1
5VTTI
6IN2
7IP2
10AVCC
30 AVCC
29 PE_EN
28 TX_EN
27 AVEE
26 AVCC
25 AVCC
24 AVEE
21 COMP
40 SCL_IN 39 SDA_IN
38 CEC_IN 37 AVEE 36 VREF_IN
35 SCL_OUT 34 SDA_OUT
31 CEC_OUT
11ON0 12OP0
13VTTO 14ON1
15OP1
16AVCC
17ON2
20OP3
9IP3
8IN3
22 AVCC
23 AVCC
19ON3
18OP2
32 AMUXVCC 33 VREF_OUT
PIN 1
INDICATOR
Mnemonic
IN0
IP0
IN1
IP1
VTTI
IN2
IP2
IN3
IP3
AVCC
ON0
OP0
VTTO
ON1
OP1
ON2
OP2
ON3
OP3
COMP
AVEE
TX_EN
PE_EN
CEC_OUT
AMUXVCC
VREF_OUT
SDA_OUT
SCL_OUT
VREF_IN
CEC_IN
SDA_IN
SCL_IN
Type
1
HS I
HS I
HS I
HS I
Power
HS I
HS I
HS I
HS I
Power
HS O
HS O
Power
HS O
HS O
HS O
HS O
HS O
HS O
Control
Power
Control
Control
LS I/O
Power
Reference
LS I/O
LS I/O
Reference
LS I/O
LS I/O
LS I/O
Description
High Speed Input Complement.
High Speed Input.
High Speed Input Complement.
High Speed Input.
Input Termination Supply. Nominally connected to AVCC.
High Speed Input Complement.
High Speed Input.
High Speed Input Complement.
High Speed Input.
Positive Analog Supply. 3.3 V nominal.
High Speed Output Complement.
High Speed Output.
Output Termination Supply. Nominally connected to AV
CC.
High Speed Output Complement.
High Speed Output.
High Speed Output Complement.
High Speed Output.
High Speed Output Complement.
High Speed Output.
Power-On Compensation Pin. Bypass to ground through a 10 µF capacitor.
Negative Analog Supply. 0 V nominal.
High Speed Output Enable Parallel Interface.
High Speed Preemphasis Enable Parallel Interface.
CEC Output Side.
Positive Auxiliary Buffer Supply. 5 V nominal.
DDC Output Side Pull-Up Reference Voltage.
DDC Output Side Data Line Input/Output.
DDC Output Side Clock Line Input/Output.
DDC Input Side Pull-Up Reference Voltage.
CEC Input Side.
DDC Input Side Data Line.
DDC Input Side Clock Line
Pin No.
1
2
3
4
5
6
7
8
9
10, 16, 22, 23, 25, 26, 30
11
12
13
14
15
17
18
19
20
21
24,
27, 37, Exposed Pad
28
29
31
32
33
34
35
36
38
39
40
1
HS = high speed, LS = low speed, I = input, and O = output.
NOTES
1. THE AD8195 LFCSP HAS AN EXPOSED PAD ON THE UNDERSIDE OF
THE PACKAGE THAT AIDS IN HEAT DISSIPATION. THE PAD MUST BE
ELECTRICALLY CONNECTED TO THE AVEE SUPPLY PLANE IN ORDER
TO MEET THERMAL SPECIFICATIONS.
AD8195
TOP VIEW
(Not to Scale)
1IN0
2IP0
3IN1
4IP1
5VTTI
6IN2
7IP2
10AVCC
30 AVCC
29 PE_EN
28 TX_EN
27 AVEE
26 AVCC
25 AVCC
24 AVEE
21 COMP
40 SCL_IN 39 SDA_IN 38 CEC_IN 37 AVEE 36 VREF_IN 35 SCL_OUT 34 SDA_OUT 31 CEC_OUT
11ON0 12OP0 13VTTO 14ON1 15OP1 16AVCC 17ON2 20OP3
9IP3
8IN3
22 AVCC
23 AVCC
19ON3 18OP2
32 AMUXVCC 33 VREF_OUT
PIN 1
INDICATOR
Mnemonic
IN0
IP0
IN1
IP1
VTTI
IN2
IP2
IN3
IP3
AVCC
ON0
OP0
VTTO
ON1
OP1
ON2
OP2
ON3
OP3
COMP
AVEE
TX_EN
PE_EN
CEC_OUT
AMUXVCC
VREF_OUT
SDA_OUT
SCL_OUT
VREF_IN
CEC_IN
SDA_IN
SCL_IN
Type
1
HS I
HS I
HS I
HS I
Power
HS I
HS I
HS I
HS I
Power
HS O
HS O
Power
HS O
HS O
HS O
HS O
HS O
HS O
Control
Power
Control
Control
LS I/O
Power
Reference
LS I/O
LS I/O
Reference
LS I/O
LS I/O
LS I/O
Description
High Speed Input Complement.
High Speed Input.
High Speed Input Complement.
High Speed Input.
Input Termination Supply. Nominally connected to AVCC.
High Speed Input Complement.
High Speed Input.
High Speed Input Complement.
High Speed Input.
Positive Analog Supply. 3.3 V nominal.
High Speed Output Complement.
High Speed Output.
Output Termination Supply. Nominally connected to AV
CC.
High Speed Output Complement.
High Speed Output.
High Speed Output Complement.
High Speed Output.
High Speed Output Complement.
High Speed Output.
Power-On Compensation Pin. Bypass to ground through a 10 µF capacitor.
Negative Analog Supply. 0 V nominal.
High Speed Output Enable Parallel Interface.
High Speed Preemphasis Enable Parallel Interface.
CEC Output Side.
Positive Auxiliary Buffer Supply. 5 V nominal.
DDC Output Side Pull-Up Reference Voltage.
DDC Output Side Data Line Input/Output.
DDC Output Side Clock Line Input/Output.
DDC Input Side Pull-Up Reference Voltage.
CEC Input Side.
DDC Input Side Data Line.
DDC Input Side Clock Line
Pin No.
1
2
3
4
5
6
7
8
9
10, 16, 22, 23, 25, 26, 30
11
12
13
14
15
17
18
19
20
21
24,
27, 37, Exposed Pad
28
29
31
32
33
34
35
36
38
39
40
1
HS = high speed, LS = low speed, I = input, and O = output.
Before Servicing
This Unit
Electrical Mechanical Repair Information Updating
54

Denon AVR-S740H Specifications

General

Channels	7.2
Power Output per Channel	75 W (8 Ohms, 20 Hz - 20 kHz, 0.08% THD)
HDMI Inputs	6
HDMI Outputs	1
Dolby Atmos	Yes
DTS:X	Yes
Bluetooth	Yes
Wi-Fi	Yes
HEOS Multi-room	Yes
4K Ultra HD Pass-through	Yes
Power Output per Channel (6 Ohms)	110 W (6 Ohms, 1 kHz, 0.7% THD)
4K/Ultra HD Upscaling	Yes
Phono Input	Yes
Dolby Support	Dolby Atmos, Dolby TrueHD, Dolby Surround
Auto Calibration	Audyssey MultEQ
Input Sensitivity/Impedance	200 mV / 47 kOhms
Signal-to-Noise Ratio	98 dB (IHF-A weighted, Direct mode)
Ethernet	Yes
USB Port	Yes (front)
AM/FM Tuner	Yes
Supported Audio Formats	MP3, WMA, AAC, FLAC, ALAC, WAV, DSD
HDR Support	HDR10, HLG, Dolby Vision
Wireless Audio	AirPlay 2
DTS Support	DTS:X, DTS-HD Master Audio
Zone Audio	Zone 2
Frequency Response	10 Hz - 100 kHz (+1, -3 dB, Direct Mode)
Total Harmonic Distortion	0.08% (20 Hz - 20 kHz)
Built-in DAC	192 kHz / 24-bit