Denon DCM-360 - Component Pin Assignments and Functions; IC AN8805 SB Terminal Functions; IC AN8389 S Terminal Functions

i DCM-360/260
DCM-360/2¢
Symbol
| Dar 1 | Bias terminal for DSL.
a7
|
DSU
YO
|
Loop
fiter
terminal
for
OSL.
46_|
PLE
190
|
Loop
titer
teninal
for
PLL.
«9
|
VOOF
~[_¥o
|
Loop
fter
termi
for
VCO.
50
|
AvDD2
1
|
Power
supply
for
analog
circuit
(for
DSL,
PLL
and
DA
output
sections).
at_|
AvSS2
[1
_[
Ground
or
analog
rut
(lor
DSL,
PLL
and
DA
output
sections)
x
lem
|
0
|
EFM
signal
output,
33
|
PCK
©
|
PLL
extract
clock
output
((PCK=4.321MHz).
54
|
PDO
4
ie}
__|
Phase
comparing
signal
output
when
compared
EFM
signal
and
PCK
signal.
55
|
Suac
|
0
_|
Subcode
serial
data
ouput
56_|
SBCK
1
|
Chock
input
for
subcode
serial
output.
Ground for oscitting circuit.
Crystal
oscilating
circuit
input
terminal,
(f=16.9344MHz}.
Crystal
oscilating
circuit
output
terminal
(1=16,9344MH2).
AN8805SB (C100)
frame clock signal output {ICLDCK=7.35kH2
[63
[FOLK
|
©
_|
Crystal
frame
clock
output
(IFCLK=7
25k).
Interpolation fag output (H": interpolation).
|_65_| FLAG
| 66 _|
).
g
3 5
oO
o
z Co S
2/3 |s
2
Hid
©
_ |
Spindie
servo
phase
synchronous
state
signal
output
(’H":CLV,
*L*:Rough
servo).
67
|
CRC
©
|
Subcode
CRC
check
result
output
(’H":OK,
"L":NG).
[AFN
|
tnput
terminal
of
RF
AGC.
Deemphasis detecting signal output (’H”:ON).
(*H™. synchronous, "L”: synchronous come off}.
a
8
8 i
a
| i
Q
fl 8
g
| _—_| Capacitor connecting terminal for RF.
Test
terminal
(normally
"H').
C.EA
|
—
__|
Capacitor
connecting
terminal
for
AMP.
Power
supply
for
analog
circuit
(Audio
output
using
both
as
Lch
and
Ach).
€.SBD0
|
_—
__|
Capacitor
connecting
terminal
for
low
speed
detection
of
dark
level
DO
detection.
|
Leh
output.
BDO
detection
output
terminal.
Positive
logic.
Capacitor
connecting
terminal
for
low
speed
detection
of
OF
TR
detection.
Output
terminal
of
OFF
TRACK
detection.
Positive
logic.
Output
terminal of
RF
signal
amplitude
detection,
Negative
logic.
GND. i
ENV output terminal.
VCC x 0.5(V) output terminal.
input terminal of LD APC forcible stop.
Output terminal of vibration detection.
Input terminal of vibration detection.
‘Output terminal of TE CROSS detection signal.
Output terminal of TEAMP.
TEAMP
reversal
input
terminal.
Connect
a
resistor.
Output terminal of FEAMP.
FEAMP
reversal
input
terminal.
Connect
a
resistor.
Control
signal
input
terminal
of
FO
balance
adjustment.
Control
signal
input
terminal
of
TE
balance
adjustment.
Resistor
connecting
terminal
for
setting
1V
converting
resistance
value
of
PDE
Resistor
connecting
terminal
for
setting
1V
converting
resistance
value
of
PDF.
Connect
fo
PIN
diode
E.
Connect to PIN diode F.
Connect
to
8,0
of
astigmatism
1/4
divided
PD.
Connect
to
A.C
of
astigmatism
1/4
divided
PD.
Rich output,
y
RSEL
|
RF
signal
polarity
selective
terminal
{RSEL="H"
at
brightness
level
"H".
RSEL="L"
at
brightness
level
"L’).
7
«|
CSEL
Crystal
oscillating
frequency
selective
terminal
(normally
“L*).
\ Fest terminal (normally “L")
SMCK
and
frequency
shitting
output
terminal
("H”:
SMCK=8.4672Mhz,
“L’:
SMCK=4.2336MHz).
SUBQ
and
mode
shifting
output
terminal
("H":
Q
code
butfer
using
mode).
22