Source Format:
Operation:
OP-Code:
Type:
Clock Cycles:
Flag:
Description:
Example:
Source Format:
Operation:
OP-Code:
Type:
Clock Cycles:
Flag:
Description:
Example:
MSB LSB
MSB LSB
C –
Z –
D –
I –
C –
Z –
D –
I –
36 EPSON S1C6200/6200A CORE CPU MANUAL
3 INSTRUCTION SET
CP XH,i Compare immediate data i with XH
CP XH,i
XH - i
3 to i0
10100100i3 i2 i1 i0 A40H to A4FH
IV
7
Set if XH < i3 to i0; otherwise, reset.
Set if XH = i
3 to i0; otherwise, reset.
Not affected
Not affected
Compares immediate data i to XH by subtracting i from the contents of XH. XH
remains unchanged.
1. When Z = 0 and C = 0 then i < XH
2. When Z = 1 and C = 0 then i = XH
3. When Z = 0 and C = 1 then i > XH
CP XH,2 CP XH,4 CP XH,9
XH register 0100 0100 0100 0100
C flag 1 0 0 1
Z flag 0 0 1 0
CP XL,i Compare immediate data i with XL
CP XL,i
XL - i
3 to i0
10100101i3 i2 i1 i0 A50H to A5FH
IV
7
Set if XL < i3 to i0; otherwise, reset.
Set if XL = i
3 to i0; otherwise, reset.
Not affected
Not affected
Compares immediate data i to XL by subtracting i from the contents of XL. XL
remains unchanged.
1. When Z = 0 and C = 0 then i < XL
2. When Z = 1 and C = 0 then i = XL
3. When Z = 0 and C = 1 then i > XL
CP XL,7 CP XL,9 CP XL,0AH
XL register 1001 1001 1001 1001
C flag 0 0 0 1
Z flag 0 0 1 0
Source Format:
Operation:
OP-Code:
Type:
Clock Cycles:
Flag:
Description:
Example:
Source Format:
Operation:
OP-Code:
Type:
Clock Cycles:
Flag:
Description:
Example:
To Next Page
Loading...
