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FALCOM BOLERO-LT - Circuit Concept

FALCOM BOLERO-LT
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BOLERO-LT Hardware Description Version 1.0.0
1.2 Circuit concept
The BOLERO-LT architecture includes the following major functional
components (
see figure 2
):
ARCHITECTURE INTEGRATES:
High-performance Quad-Band GSM/GPRS core (operating at
26MHz),
20 parallel channel low-power GPS core (operating at L1 1575.42
MHz and C/A code 1,023 MHz chip rate),
ARM7TDMI Processor (at speed 25MHz) that controls all functions of
the system,
Internal SIM card reader (
1.8V and 3V
),
Internal GSM antenna,
Internal GPS antenna,
Options to BOLERO-LT
3D motion sensor
Rechargeable Li-Polymer battery (see Ordering Guide),
Audio for voice call
Physical interfaces:
Power supply line,
1x Multi-line I/O,
1 x Ignition;
RS232 port
SIM Card reader (Type: Molex-91228-0002 small SIM Card)
LED status indicators.
Figure 2: Architecture of the BOLERO-LT terminal
This confidential document is a property of FALCOM and may not be copied or circulated without previous permission.
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